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32 条记录 (耗时 0.034 秒)

    A/D converter
    1.
    发明授权
    A/D converter 失效
    A / D转换器

    公开(公告)号：US4833474A

    公开(公告)日：1989-05-23

    申请号：US88418

    申请日：1987-08-24

    申请人： Kenji Nagai ,  Masayuki Yamashita ,  Masafumi Kanagawa ,  Mitsumasa Sato ,  Tsuneo Ito

    发明人： Kenji Nagai ,  Masayuki Yamashita ,  Masafumi Kanagawa ,  Mitsumasa Sato ,  Tsuneo Ito

    IPC分类号： H03M3/04

    CPC分类号： H03M3/324 ,  H03M3/458

    摘要： An A/D converter apparatus comprises: a sampling signal generating means to generate an oversampling signal and an internal sampling signal; a converter means to convert an input analog signal into a digital signal in synchronism with the oversampling signal; and a decimator means to perform a specified decimation on the digital signal in synchronism with the internal sampling signal; whereby the sampling signal generating means maintains the frequencies of the oversampling signal and the internal sampling signal in a specified relationship.

    摘要翻译： A / D转换装置包括：采样信号发生装置，用于产生过采样信号和内部采样信号; 转换器装置，用于将输入模拟信号转换成与过采样信号同步的数字信号; 以及抽取器装置，用于与内部采样信号同步地对数字信号执行指定的抽取; 由此采样信号发生装置以特定的关系维持过采样信号和内部采样信号的频率。

    Mask ROM using tunnel current detection to store data and a method of manufacturing thereof
    5.
    发明授权
    Mask ROM using tunnel current detection to store data and a method of manufacturing thereof 失效
    掩模ROM使用隧道电流检测来存储数据及其制造方法

    公开(公告)号：US5464989A

    公开(公告)日：1995-11-07

    申请号：US245305

    申请日：1994-05-17

    申请人： Shinichi Mori ,  Osamu Ueda ,  Masayuki Yamashita

    发明人： Shinichi Mori ,  Osamu Ueda ,  Masayuki Yamashita

    IPC分类号： G11C11/56 ,  H01L21/8246 ,  H01L27/112 ,  H01L49/02

    CPC分类号： G11C11/5692 ,  H01L27/112 ,  Y10S257/926 ,  Y10S438/981

    摘要： Each of the portions corresponding to the crossings of a plurality of first strip conductive layers serving as bit lines and a plurality of second strip conductive layers serving as word lines crossing the conductive layers at right angles is used as one memory cell. An oxide film is provided between the first strip conductive layers and the second strip conductive layers. The thickness of this oxide film is set in each memory cell according to stored data. Also a multi-value memory can be realized, since the amount of stored data in each memory cell is an arbitrary amount of 1 bit or more by making the stored data of a plurality of types of memory cells having different thicknesses in the tunnel oxide film 15 correspond to a plurality of different data. The size of each memory cell can be reduced since the occupying area of each memory cell on the semiconductor substrate is dependent on the width of the first strip conductive layer and the second strip conductive layer. An insulation film in which tunnel phenomenon is generated can be formed using conventional manufacturing technology.

    摘要翻译： 作为用作位线的多个第一带状导电层和作为与导电层成直角交叉的字线的多个第二带状导电层的交叉部分的每个部分被用作一个存储单元。 在第一带状导电层和第二带状导电层之间设置氧化膜。 根据存储的数据，将该氧化膜的厚度设定在各存储单元中。 另外，可以实现多值存储器，因为通过在隧道氧化膜中存储具有不同厚度的多种类型的存储单元的存储数据，每个存储单元中存储的数据量是1位或更多的任意量 15对应于多个不同的数据。 由于半导体衬底上的每个存储单元的占有面积取决于第一带状导电层和第二带状导电层的宽度，因此可以减小每个存储单元的尺寸。 可以使用传统的制造技术形成其中产生隧道现象的绝缘膜。

    Semiconductor device improved in light shielding property and light shielding package
    6.
    发明授权
    Semiconductor device improved in light shielding property and light shielding package 失效
    半导体器件改善了遮光性能和遮光封装

    公开(公告)号：US5394014A

    公开(公告)日：1995-02-28

    申请号：US149893

    申请日：1993-11-10

    申请人： Masahiko Ishikawa ,  Kohji Hayano ,  Shinichi Mori ,  Masayuki Yamashita ,  Osamu Ueda ,  Namiki Moriga

    发明人： Masahiko Ishikawa ,  Kohji Hayano ,  Shinichi Mori ,  Masayuki Yamashita ,  Osamu Ueda ,  Namiki Moriga

    IPC分类号： H01L23/06 ,  H01L23/29 ,  H01L23/31 ,  H01L23/552 ,  H01L23/28

    CPC分类号： H01L23/552 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01078 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025

    摘要： In accordance with one aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip which is directly covered with a resin material having a light shielding property as well as a film which is provided on the resin material for shielding the semiconductor device against light. The film may be formed by a seal having a surface which is covered with a metal and a rear surface which is colored black, a layer of a metal or ceramics which is deposited in a vapor phase, or a coating of an insulating material whose refractive index is different from that of the resin material. In another aspect of the present invention, provided is a semiconductor device which is directly covered with a resin material mixed with a light absorbing material. In still another aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip, having a surface covered with black polyimide, which is further covered with a resin material having a light shielding property. In a further aspect of the present invention, provided is a package for covering a semiconductor device which is mounted on a wiring board. According to such improvement, a light shielding property is improved particularly in relation to a thin semiconductor device whose thickness is only about 1 mm, and the semiconductor device is prevented from a malfunction caused by light.

    摘要翻译： 根据本发明的一个方面，提供一种半导体器件，其包括直接由具有遮光性的树脂材料覆盖的半导体芯片以及设置在用于屏蔽半导体器件的树脂材料上的膜 光。 膜可以由具有被金属覆盖的表面和着色为黑色的后表面，以蒸气相沉积的金属或陶瓷层的密封件或者折射率为绝缘材料的绝缘材料的涂层形成， 指数与树脂材料的指数不同。 在本发明的另一方面，提供一种直接用与吸光材料混合的树脂材料覆盖的半导体器件。 在本发明的另一方面，提供一种半导体器件，其包括具有被黑色聚酰亚胺覆盖的表面的半导体芯片，该半导体器件进一步被具有遮光性的树脂材料覆盖。 在本发明的另一方面，提供一种用于覆盖安装在布线板上的半导体器件的封装。 根据这样的改进，特别是相对于厚度仅为1mm的薄型半导体器件而言，防光性能得到改善，并且防止了由于光引起的故障的半导体器件。

    Fused cyclic compounds
    7.
    发明授权
    Fused cyclic compounds 有权
    熔融环状化合物

    公开(公告)号：US07732626B2

    公开(公告)日：2010-06-08

    申请号：US12308699

    申请日：2007-06-26

    申请人： Tsuneo Yasuma ,  Nobuyuki Negoro ,  Masayuki Yamashita ,  Masahiro Itou

    发明人： Tsuneo Yasuma ,  Nobuyuki Negoro ,  Masayuki Yamashita ,  Masahiro Itou

    IPC分类号： C07D307/80

    CPC分类号： C07D409/12 ,  C07D307/80

    摘要： The present invention provides a compound represented by the formula (I): wherein each symbol is as defined in the description, or a salt thereof. The compound or a salt thereof or a prodrug thereof has a GPR40 receptor function modulating action and is useful as an insulin secretagogue or an agent for the prophylaxis or treatment of diabetes and the like.

    摘要翻译： 本发明提供由式（I）表示的化合物：其中每个符号如说明书中所定义，或其盐。 化合物或其盐或其前药具有GPR40受体功能调节作用，并且可用作胰岛素促分泌素或用于预防或治疗糖尿病等的药剂。

    Printing apparatus
    8.
    发明授权
    Printing apparatus 失效

    公开(公告)号：US07095516B2

    公开(公告)日：2006-08-22

    申请号：US10354320

    申请日：2003-01-30

    申请人： Masayuki Yamashita ,  Eiichi Saito

    发明人： Masayuki Yamashita ,  Eiichi Saito

    IPC分类号： G06K15/00 ,  H04N1/00

    CPC分类号： B41J29/393

    摘要： A printing apparatus includes a recording medium for recording image data and recording medium information, a recording medium read-out device, a print control device for giving a print command for printing the image data, a recording device for recording the recording medium information of the recording medium and information on automatic print records and a comparator. When the print control device has detected that a battery for a power source will run down during printing, the comparator detects, after turning on of the power source again, that the recording medium information of the recording device is coincident with that of the recording medium and then, the print control device gives a further print command for continuously printing, in accordance with the information on the automatic print records recorded in the recording device, the image data designated by the print command given prior to turning on of the power source again.

    Piperidine derivative, process for producing the same, and use
    9.
    发明申请
    Piperidine derivative, process for producing the same, and use 失效
    哌啶衍生物，其制备方法和用途

    公开(公告)号：US20060167052A1

    公开(公告)日：2006-07-27

    申请号：US10516252

    申请日：2003-05-29

    申请人： Yoshinori Ikeura ,  Tadatoshi Hashimoto ,  Naoki Tarui ,  Junya Shirai ,  Masayuki Yamashita

    发明人： Yoshinori Ikeura ,  Tadatoshi Hashimoto ,  Naoki Tarui ,  Junya Shirai ,  Masayuki Yamashita

    IPC分类号： A61K31/454 ,  C07D403/02

    CPC分类号： C07D405/14 ,  C07D211/46 ,  C07D401/06 ,  C07D401/10 ,  C07D401/12 ,  C07D401/14 ,  C07D405/06 ,  C07D405/10 ,  C07D409/06 ,  C07D409/10 ,  C07D413/06 ,  C07D413/10 ,  C07D413/14 ,  C07D417/06 ,  C07D417/14

    摘要： The present invention provides a compound represented by the formula: wherein Ar is an aryl group, an aralkyl group or an aromatic heterocyclic group, each of which may be substituted, R1 is a hydrogen atom, an optionally substituted hydrocarbon group, an acyl group or an optionally substituted heterocyclic group, X is an oxygen atom or an optionally lo substituted imino group, Z is an optionally substituted methylene group, Ring A is an optionally further substituted piperidine ring, and Ring B is an optionally substituted aromatic ring, provided that when Z is a methylene group substituted with an oxo group, R1 is not a methyl group, and 15 when Z is a methylene group substituted with a methyl group, Ring B is a substituted aromatic ring, or a salt thereof, which is a novel piperidine derivative having excellent antagonistic action for a tachykinin receptor and useful as a medicament, particularly an agent for preventing and/or treating urinary frequency and/or urinary incontinence.

    摘要翻译： 本发明提供由下式表示的化合物：其中Ar是芳基，芳烷基或芳族杂环基，其各自可以被取代，R 1是氢原子，任选地 取代烃基，酰基或任选取代的杂环基，X是氧原子或任选取代的亚氨基，Z是任选取代的亚甲基，环A是任选进一步取代的哌啶环，环B是 任选取代的芳环，条件是当Z是被氧代基取代的亚甲基时，R 1不是甲基，而当Z是被甲基取代的亚甲基时，R 1是环B 是取代的芳香环或其盐，其是对速激肽受体具有优异拮抗作用的新型哌啶衍生物，并且可用作药物，特别是用于预防和/或治疗尿频和/或 尿失禁

    Static semiconductor memory device operating at high speed under lower power supply voltage
    10.
    发明授权
    Static semiconductor memory device operating at high speed under lower power supply voltage 失效
    静态半导体存储器件在较低电源电压下高速工作

    公开(公告)号：US6067256A

    公开(公告)日：2000-05-23

    申请号：US72138

    申请日：1998-05-05

    申请人： Masayuki Yamashita ,  Hideki Kawamura

    发明人： Masayuki Yamashita ,  Hideki Kawamura

    IPC分类号： G11C7/12 ,  G11C11/419 ,  G11C16/04

    CPC分类号： G11C11/419 ,  G11C7/12

    摘要： A bit line load element for reducing a bit line amplitude during data reading is formed of p- and n-channel MOS transistors connected in parallel. When a word line is driven to the selected state, the p-channel MOS transistor is held off. In the data write operation, both the n- and p-channel MOS transistors are turned off. Even under a low power supply voltage, a sufficiently large bit line amplitude can be produced without an influence by a size of the bit line load element. By deactivating the bit line load element in the data write operation, it is possible to prevent generation of a DC current during data writing.

    摘要翻译： 用于在数据读取期间减小位线幅度的位线负载元件由并联连接的p沟道MOS晶体管和n沟道MOS晶体管形成。 当字线被驱动到所选择的状态时，p沟道MOS晶体管被截止。 在数据写入操作中，n沟道和p沟道MOS晶体管都被截止。 即使在低电源电压下，也可以不受位线负载元件的尺寸的影响而产生足够大的位线幅度。 通过在数据写入操作中去激活位线负载元件，可以防止数据写入期间产生直流电流。