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    MEMORY DEVICE
    1.
    发明申请
    MEMORY DEVICE 有权

    公开(公告)号：US20230071302A1

    公开(公告)日：2023-03-09

    申请号：US17684736

    申请日：2022-03-02

    Applicant: Kioxia Corporation

    Inventor： Yuichi ITO ,  Taichi IGARASHI

    IPC: H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

    Abstract: According to one embodiment, a memory device includes: a switching element including first and second conductive layers, and a variable resistive layer between the first and second conductive layers. The first or second conductive layers includes a first layer, a second layer between the first layer and the variable resistive layer, and a third layer between the first layer and the second layer. Each of the first and second layers is selected from a layer including carbon, a layer including nitrogen and carbon, a layer including nitrogen and titanium, a layer including nitrogen and tantalum, a layer including tungsten, a layer including nitrogen and tungsten, and a layer including platinum. The third layer includes at least one selected from lithium, sodium, magnesium, calcium, titanium, or lanthanum.

    MEMORY DEVICE
    2.
    发明申请
    MEMORY DEVICE 有权

    公开(公告)号：US20210296568A1

    公开(公告)日：2021-09-23

    申请号：US17003846

    申请日：2020-08-26

    Applicant: KIOXIA CORPORATION

    Inventor： Taichi IGARASHI ,  Tadaomi DAIBOU ,  Junichi ITO ,  Tadashi KAI ,  Shogo ITAI ,  Toshiyuki ENDA

    IPC: H01L43/02 ,  H01L27/22 ,  G11C11/16

    Abstract: According to one embodiment, a memory device includes a first wiring extending in a first direction, and a second wiring extending in a second direction that intersects the first direction. A memory cell is between the first wiring and the second wiring and includes a resistive memory element and a switching element that are connected in series between the first wiring and the second wiring. An insulating region surrounds side surfaces of the memory cell. The insulating region includes a first insulating part adjacent to a side surface of the resistive memory element and a second insulating part adjacent to a side surface of the switching element. The second insulating part has a higher thermal conductivity than the first insulating part.

    MEMORY DEVICE
    5.
    发明公开
    MEMORY DEVICE 审中-公开

    公开(公告)号：US20230298647A1

    公开(公告)日：2023-09-21

    申请号：US17843084

    申请日：2022-06-17

    Applicant: Kioxia Corporation

    Inventor： Kuniaki SUGIURA ,  Taichi IGARASHI

    IPC: G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/12

    CPC classification number: G11C11/161 ,  G11C11/1675 ,  H01L27/222 ,  H01L43/02 ,  H01L43/12

    Abstract: According to one embodiment, a memory device includes: a first memory cell; a second memory cell; a first circuit configured to supply a write current to the first memory cell and the second memory cell; a first wiring coupled to the first circuit; a first electrode configured to electrically couple the first memory cell to the first wiring; and a second electrode configured to electrically couple the second memory cell to the first wiring. A length of the first wiring from the first circuit to the first electrode is smaller than a length of the first wiring from the first circuit to the second electrode. A resistance value of the first electrode is higher than a second resistance value of the second electrode.

    MEMORY DEVICE
    6.
    发明申请
    MEMORY DEVICE 有权

    公开(公告)号：US20230083008A1

    公开(公告)日：2023-03-16

    申请号：US17550194

    申请日：2021-12-14

    Applicant: Kioxia Corporation

    Inventor： Taichi IGARASHI ,  Yuichi ITO ,  Eiji KITAGWA ,  Taiga ISODA

    IPC: H01L43/02 ,  H01L27/22 ,  H01L43/10

    Abstract: According to one embodiment, a memory device includes a memory cell including a magnetoresistive effect element. The magnetoresistive effect element includes a non-magnetic layer between first and second electrodes in the first direction, a first magnetic layer between the first electrode and the non-magnetic layer, a second magnetic layer between the second electrode and the non-magnetic layer, and a first layer between the second electrode and the second magnetic layer. The first layer includes oxygen and at least one selected from magnesium, transition metal, and lanthanoid, the first layer has a first size in the first direction, the non-magnetic layer has a second size in the first direction. The first size is 1.1 times or more and 2 times or less the second size.

    MAGNETORESISTIVE MEMORY DEVICE
    7.
    发明申请
    MAGNETORESISTIVE MEMORY DEVICE 有权

    公开(公告)号：US20210082999A1

    公开(公告)日：2021-03-18

    申请号：US16816775

    申请日：2020-03-12

    Applicant: KIOXIA CORPORATION

    Inventor： Masaru TOKO ,  Tadaomi DAIBOU ,  Junichi ITO ,  Taichi IGARASHI ,  Tadashi KAI

    IPC: H01L27/22 ,  H01L43/10 ,  H01L43/02 ,  G11C11/16

    Abstract: A magnetoresistive memory device according to one embodiment includes: first and second layer stacks, each of which includes: a first ferromagnetic layer having a magnetization directed in a first direction; a non-magnetic first conductive layer above the first ferromagnetic layer, a second ferromagnetic layer provided above the first conductive layer and having a magnetization directed in a second direction different from the first direction, a first insulating layer on an upper surface of the second ferromagnetic layer, and a third ferromagnetic layer above the first insulating layer. The second ferromagnetic layer of the second layer stack is thicker than the second ferromagnetic layer of the first layer stack.

    MAGNETORESISTANCE MEMORY DEVICE AND METHOD OF MANUFACTURING MAGNETORESISTANCE MEMORY DEVICE
    9.
    发明申请
    MAGNETORESISTANCE MEMORY DEVICE AND METHOD OF MANUFACTURING MAGNETORESISTANCE MEMORY DEVICE 有权

    公开(公告)号：US20220085278A1

    公开(公告)日：2022-03-17

    申请号：US17465696

    申请日：2021-09-02

    Applicant: Kioxia Corporation

    Inventor： Taichi IGARASHI

    IPC: H01L43/02 ,  H01L27/22 ,  H01L43/12

    Abstract: In general, according to one embodiment, a magnetoresistance memory device includes: a first conductor; a second conductor on the first conductor; a first element on the second conductor; a third conductor on the first element; and a first layer stack on the third conductor. The second conductor is amorphous. The first element includes a silicon oxide introduced with a dopant. The first layer stack includes a first magnetic layer, a second magnetic layer, and a first insulating layer between the first magnetic layer and the second magnetic layer.

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