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1.
公开(公告)号:US08641916B2
公开(公告)日:2014-02-04
申请号:US12692913
申请日:2010-01-25
申请人: Koichi Yatsuda , Yoshinobu Ooya , Shin Okamoto , Hiromasa Mochiki
发明人: Koichi Yatsuda , Yoshinobu Ooya , Shin Okamoto , Hiromasa Mochiki
IPC分类号: B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , H01L21/302 , H01L21/461
CPC分类号: H01J37/32146 , H01J37/32091 , H01J37/32697
摘要: A plasma etching method for forming a hole in an etching target film by a plasma processing apparatus is provided. The apparatus includes an RF power supply for applying RF power for plasma generation to at least one of upper and lower electrodes, and a DC power supply for applying minus DC voltage to the upper electrode. A first condition that plasma is generated by turning on the RF power supply and minus DC voltage is applied to the upper electrode and a second condition that the plasma is extinguished by turning off the RF power supply and minus DC voltage is applied to the upper electrode are alternately repeated. Etching is performed by positive ions in the plasma under the first condition and negative ions are supplied into the hole by the DC voltage to neutralize positive ions in the hole under the second condition.
摘要翻译: 提供了一种通过等离子体处理装置在蚀刻靶膜中形成孔的等离子体蚀刻方法。 该装置包括用于向上电极和下电极中的至少一个施加用于等离子体产生的RF功率的RF电源,以及用于向上电极施加负DC电压的DC电源。 通过接通RF电源产生等离子体的第一条件和负DC电压被施加到上电极,并且通过关闭RF电源而将等离子体熄灭的第二条件并且将负DC电压施加到上电极 交替重复。 在第一条件下,通过正离子在等离子体中进行蚀刻,并且通过DC电压将负离子供给到孔中,以在第二条件下中和孔中的正离子。
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2.
公开(公告)号:US20100190350A1
公开(公告)日:2010-07-29
申请号:US12692913
申请日:2010-01-25
申请人: Koichi YATSUDA , Yoshinobu Ooya , Shin Okamoto , Hiromasa Mochiki
发明人: Koichi YATSUDA , Yoshinobu Ooya , Shin Okamoto , Hiromasa Mochiki
IPC分类号: H01L21/3065
CPC分类号: H01J37/32146 , H01J37/32091 , H01J37/32697
摘要: A plasma etching method for forming a hole in an etching target film by a plasma processing apparatus is provided. The apparatus includes an RF power supply for applying RF power for plasma generation to at least one of upper and lower electrodes, and a DC power supply for applying minus DC voltage to the upper electrode. A first condition that plasma is generated by turning on the RF power supply and minus DC voltage is applied to the upper electrode and a second condition that the plasma is extinguished by turning off the RF power supply and minus DC voltage is applied to the upper electrode are alternately repeated. Etching is performed by positive ions in the plasma under the first condition and negative ions are supplied into the hole by the DC voltage to neutralize positive ions in the hole under the second condition.
摘要翻译: 提供了一种通过等离子体处理装置在蚀刻靶膜中形成孔的等离子体蚀刻方法。 该装置包括用于向上电极和下电极中的至少一个施加用于等离子体产生的RF功率的RF电源,以及用于向上电极施加负DC电压的DC电源。 通过接通RF电源产生等离子体的第一条件和负DC电压被施加到上电极,并且通过关闭RF电源而将等离子体熄灭的第二条件并且将负DC电压施加到上电极 交替重复。 在第一条件下,通过正离子在等离子体中进行蚀刻,并且通过DC电压将负离子供给到孔中,以在第二条件下中和孔中的正离子。
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公开(公告)号:US09373521B2
公开(公告)日:2016-06-21
申请号:US12943323
申请日:2010-11-10
IPC分类号: H01L21/302 , H01L21/461 , B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , H01L21/311 , H01J37/32 , H01L21/027 , H01L21/3213
CPC分类号: H01L21/31116 , H01J37/32091 , H01J37/32165 , H01L21/0273 , H01L21/31122 , H01L21/31138 , H01L21/31144 , H01L21/32137
摘要: An etching processing method for etching a substrate formed with a target film and a mask film is performed in a substrate processing apparatus including a first and a second power supply for respectively supplying a higher and a lower high frequency power to a processing space and a mounting table, and a DC power supply for supplying a DC power to an electrode. The method includes a modification step for modifying a shape of a pattern formed on the mask film; and an etching step for etching the target film by using the mask film. The mask film is etched by the plasma in the modification step. Further, in the etching step, the DC power is applied to the electrode and the lower high frequency power is applied to the mounting table in a pulse wave form in which a higher and a lower power level are repeated.
摘要翻译: 在包括第一和第二电源的基板处理装置中执行用于蚀刻形成有目标膜和掩模膜的基板的蚀刻处理方法,该第一和第二电源分别向处理空间提供较高和较低的高频功率, 台,以及用于向电极提供直流电力的直流电源。 该方法包括用于修改形成在掩模膜上的图案的形状的修改步骤; 以及通过使用掩模膜蚀刻目标膜的蚀刻步骤。 在修改步骤中,通过等离子体蚀刻掩模膜。 此外,在蚀刻步骤中,将直流电力施加到电极,并且将较低的高频功率以重复更高和较低功率电平的脉搏波形式施加到安装台。
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公开(公告)号:US20050106875A1
公开(公告)日:2005-05-19
申请号:US10948241
申请日:2004-09-24
申请人: Kazuhiro Kubota , Yoshiki Igarashi , Shigeru Tahara , Shin Okamoto , Toshihiko Shindo , Yoshinobu Ooya
发明人: Kazuhiro Kubota , Yoshiki Igarashi , Shigeru Tahara , Shin Okamoto , Toshihiko Shindo , Yoshinobu Ooya
IPC分类号: G03F7/42 , H01L21/027 , H01L21/302 , H01L21/306 , H01L21/3065 , H01L21/311 , H01L21/461
CPC分类号: H01L21/31116 , H01J2237/3342 , H01L21/31138
摘要: A plasma ashing method of an object to be processed removes a resist film therefrom in a processing vessel after etching a part of a low dielectric constant film with the resist film having a pattern thereon as a mask in the processing vessel. The plasma ashing method includes a first and a second ashing processes. The first ashing process removes deposits off an inner wall of the processing vessel by using a first processing gas including at least O2 gas while controlling the pressure in the processing vessel to be smaller than or equal to 20 mTorr. The second ashing process removes the resist film by using a second processing gas including at least O2 gas.
摘要翻译: 在处理容器内蚀刻一部分具有图案的抗蚀剂膜作为掩模的低介电常数膜的一部分后,处理容器中的等离子体灰化方法从处理容器中除去抗蚀剂膜。 等离子体灰化方法包括第一和第二灰化过程。 第一灰化过程通过使用包括至少O 2 2气体的第一处理气体同时将处理容器中的压力控制在小于或等于20mTorr,从处理容器的内壁去除沉积物 。 第二灰化处理通过使用至少包含O 2 O 2气体的第二处理气体去除抗蚀剂膜。
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公开(公告)号:US06488863B2
公开(公告)日:2002-12-03
申请号:US09970852
申请日:2001-10-05
IPC分类号: H01L213065
CPC分类号: H01L21/31116
摘要: An etching gas is supplied into a process chamber and turned into plasma so as to etch a silicon nitride film arranged on a field silicon oxide film on a wafer (w). A mixture gas containing at least CH2F2 gas and O2 gas is used as the etching gas. Parameters for planar uniformity, by which the etching apparatus is set in light of a set value of the planar uniformity, include the process pressure and the mixture ratio (CH2F2/O2) of the mixture gas. As the set value of the planar uniformity is more strict, either one of the process pressure and the mixture ratio is set higher.
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公开(公告)号:US08287750B2
公开(公告)日:2012-10-16
申请号:US12686899
申请日:2010-01-13
申请人: Toshihiko Shindo , Shin Okamoto , Kimihiro Higuchi
发明人: Toshihiko Shindo , Shin Okamoto , Kimihiro Higuchi
IPC分类号: H01L21/3065 , C23F1/08
CPC分类号: H01L21/67069 , H01J37/32082 , H01J2237/004 , H01L21/6831
摘要: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
摘要翻译: 一种等离子体处理方法,用于通过使等离子体作用于待处理衬底上的等离子体处理方法包括以下顺序步骤:使等离子体中使用的等离子体处于弱于等离子体处理的等离子体作用于衬底上,将DC电压施加到静电 用于吸引和保持衬底的卡盘,而弱等离子体作用在衬底上,熄灭弱等离子体并进行等离子体处理。 此外,等离子体处理装置包括用于对要处理的基板进行等离子体处理的等离子体处理机构,以及用于控制等离子体处理机构从而执行等离子体处理方法的控制器。
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公开(公告)号:US06589435B1
公开(公告)日:2003-07-08
申请号:US09674482
申请日:2000-11-08
申请人: Shin Okamoto , Shunichi Iimuro
发明人: Shin Okamoto , Shunichi Iimuro
IPC分类号: H01L213065
CPC分类号: H01L21/31116
摘要: Contact holes (36a, 36b) are formed by means of plasma etching, such that the contact holes are formed from the top surface of a silicon oxide insulating film (31) down to a wiring layer (33a) at a deep position and a wiring layer (33b) at a shallow position, respectively, which are embedded in the insulating film (31). A process gas containing C4F8, CO, and Ar is used, while the process pressure is set to be from 30 to 60 mTorr, and the partial pressure of the C4F8 gas is set to be from 0.07 to 0.35 mTorr. Under these conditions, the process gas is turned into plasma, and the insulating film (31) is etched with the plasma to form the contact holes (36a, 36b).
摘要翻译: 通过等离子体蚀刻形成接触孔(36a,36b),使得接触孔从氧化硅绝缘膜(31)的顶表面形成为深度到布线层(33a)和布线 层(33b)分别嵌入在绝缘膜(31)中的浅位置处。 使用含有C4F8,CO和Ar的工艺气体,同时将工艺压力设定为30〜60mTorr,将C4F8气体的分压设定为0.07〜0.35mTorr。 在这些条件下,处理气体变成等离子体,用等离子体蚀刻绝缘膜(31),形成接触孔(36a,36b)。
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公开(公告)号:US07541283B2
公开(公告)日:2009-06-02
申请号:US11066260
申请日:2005-02-28
申请人: Toshihiko Shindo , Shin Okamoto , Kimihiro Higuchi
发明人: Toshihiko Shindo , Shin Okamoto , Kimihiro Higuchi
IPC分类号: H01L21/44
CPC分类号: H01L21/67069 , H01J37/32082 , H01J2237/004 , H01L21/6831
摘要: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
摘要翻译: 一种等离子体处理方法,用于通过使等离子体作用于待处理衬底上的等离子体处理方法包括以下顺序步骤:使等离子体中使用的等离子体处于弱于等离子体处理的等离子体作用于衬底上,将DC电压施加到静电 用于吸引和保持衬底的卡盘,而弱等离子体作用在衬底上,熄灭弱等离子体并进行等离子体处理。 此外,等离子体处理装置包括用于对要处理的基板进行等离子体处理的等离子体处理机构,以及用于控制等离子体处理机构从而执行等离子体处理方法的控制器。
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公开(公告)号:US07326650B2
公开(公告)日:2008-02-05
申请号:US10399626
申请日:2001-10-01
IPC分类号: H01L21/302
CPC分类号: H01L21/76835 , H01L21/76811 , H01L21/76813
摘要: In an etching method for achieving a dual damascene structure by using at least one layer of a low-k film and at least one layer of a hard mask, a dummy film, which is ultimately not left in the dual damascene structure, is formed in at least one layer over the hard mask in order to prevent shoulder sag. By adopting this method, a dual damascene structure in which the extent of the shoulder sag at the hard mask is minimized can be achieved through etching.
摘要翻译: 在通过使用至少一层低k膜和至少一层硬掩模层来实现双镶嵌结构的蚀刻方法中,最终不留在双镶嵌结构中的虚拟膜形成在 至少一层在硬掩模上,以防止肩下垂。 通过采用这种方法,可以通过蚀刻来实现在硬掩模处的肩部凹陷的程度最小化的双镶嵌结构。
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公开(公告)号:US07300881B2
公开(公告)日:2007-11-27
申请号:US10935103
申请日:2004-09-08
申请人: Kazuya Kato , Katsuhiko Ono , Hideki Mizuno , Masahiro Ogasawara , Akinori Kitamura , Noriyuki Kobayashi , Yasushi Inata , Shin Okamoto
发明人: Kazuya Kato , Katsuhiko Ono , Hideki Mizuno , Masahiro Ogasawara , Akinori Kitamura , Noriyuki Kobayashi , Yasushi Inata , Shin Okamoto
IPC分类号: H01L21/302 , H01L21/3065
CPC分类号: H01J37/32082 , H01L21/31116 , H01L21/31138
摘要: A plasma etching is performed on a substrate having a pattern wherein an interval between neighboring openings formed on a resist mask is equal to or less than 200 nm, wherein the etching is performed by converting a processing gas comprising an active species generating gas which includes a compound having carbon and fluorine, and a nonreactive gas which includes xenon gas into a plasma. The nonreactive gas further includes argon gas.
摘要翻译: 在具有图案的基板上进行等离子体蚀刻,其中形成在抗蚀剂掩模上的相邻开口之间的间隔等于或小于200nm,其中通过将包括活性物质产生气体的处理气体转化为包括 具有碳和氟的化合物,以及包含氙气进入等离子体的非反应性气体。 非反应性气体还包括氩气。
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