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公开(公告)号：US20240180041A1
公开(公告)日：2024-05-30
申请号：US18522771
申请日：2023-11-29
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor： Seung Hyub BAEK , Soo Young JUNG , Sunghoon HUR , Ji-Soo JANG , Jungho YOON , Hyun-Cheol SONG , Seong Keun KIM , Chong Yun KANG , Ji-Won CHOI , Jin Sang KIM
IPC: H10N30/00 , C30B23/04 , C30B29/22 , H10N30/072 , H10N30/082 , H10N30/853
CPC classification number: H10N30/10513 , C30B23/04 , C30B29/22 , H10N30/072 , H10N30/082 , H10N30/8536 , H10N30/8548 , H10N30/8561
Abstract: The present invention relates to a heterojunction semiconductor substrate having excellent dielectric properties, a method of manufacturing the same, and an electronic device using the same. The present invention provides a heterojunction semiconductor substrate with improved interlayer adhesion, low leakage current, and excellent dielectric properties that maintain strength in a ferroelectric fatigue experiment by interposing a metal layer and a conductive metal oxide layer on a semiconductor substrate to form an epitaxial oxide thin film layer composed of perovskite piezoelectric oxide. The heterojunction semiconductor substrate can be applied to sensors, actuators, transducers, or MEMS devices that use the high functionality of the high-quality epitaxial oxide thin film layer, including applications in electronic and optical devices.
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2.发明申请THIN FILM CONDENSER FOR HIGH-DENSITY PACKAGING, METHOD FOR MANUFACTURING THE SAME, AND HIGH-DENSITY PACKAGE SUBSTRATE INCLUDING THE SAME 审中-公开用于高密度包装的薄膜冷凝器，其制造方法和包括其的高密度包装基材公开(公告)号：US20130314842A1
公开(公告)日：2013-11-28
申请号：US13677664
申请日：2012-11-15
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor： Chong Yun KANG , Min Gyu KANG , Seok Jin YOON , Ji Won CHOI , Seung Hyub BAEK , Jin Sang KIM
Abstract: Provided are a thin film condenser for high-density packaging, a method for manufacturing the same and a high-density package substrate. The thin film condenser for high-density packaging, includes: a support substrate; a lower electrode formed on the support substrate; a dielectric thin film formed on the lower electrode; and an upper electrode formed on the dielectric thin film. Provided also is a method for manufacturing the same. The high-density package substrate, includes: at least two stacked substrates; thin film condensers embedded in the stacked substrates; an internal connection electrode formed in the stacked substrates and connecting the thin film condensers in series or in parallel; a surface electrode formed on the surface of the outermost substrate among the stacked substrates and connected to the internal connection electrode; and an integrated circuit connected to the surface electrode via a bump.
Abstract translation: 提供一种用于高密度封装的薄膜电容器，其制造方法和高密度封装衬底。 用于高密度封装的薄膜冷凝器包括：支撑基板; 形成在所述支撑基板上的下电极; 形成在下电极上的电介质薄膜; 以及形成在电介质薄膜上的上电极。 还提供其制造方法。 高密度封装基板包括：至少两个堆叠的基板; 嵌入在堆叠的基板中的薄膜电容器; 内部连接电极，形成在堆叠的基板中并串联或并联连接薄膜电容器; 表面电极，形成在所述层叠基板的最外侧基板的表面上，与所述内部连接用电极连接; 以及通过凸块与表面电极连接的集成电路。
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公开(公告)号：US20210005609A1
公开(公告)日：2021-01-07
申请号：US16854471
申请日：2020-04-21
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor： Sang Tae KIM , Hyun-Cheol SONG , Seung Hyub BAEK , Ji-Won CHOI , Jin Sang KIM , Chong Yun KANG , Seong Keun KIM
IPC: H01L27/108 , H01L21/285 , H01L49/02
Abstract: A method of manufacturing an electrode layer and a method of manufacturing a capacitor using the same are provided. The method of manufacturing the electrode layer includes performing a first sub-cycle sequentially providing a tin precursor and an oxygen source on a substrate, performing a second sub-cycle sequentially providing a tin precursor, a tantalum precursor, and an oxygen source on the substrate on which the first sub-cycle is performed, and repeating a cycle including the first sub-cycle and the second sub-cycle to form a tantalum-doped tin oxide layer on the substrate. A tantalum concentration in the tantalum-doped tin oxide layer is determined by the tin precursor provided in the second sub-cycle.
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4.发明申请公开(公告)号：US20180358146A1
公开(公告)日：2018-12-13
申请号：US15990824
申请日：2018-05-29
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor： Ji-Won CHOI , Jin Sang KIM , Chong Yun KANG , Seong Keun KIM , Seung Hyub BAEK , Sang Tae KIM , Won Jae LEE , Narendra Singh PARMAR , Young-Shin LEE
IPC: H01B1/22 , H01L29/20 , H01L21/288
Abstract: The present disclosure relates to a paste for ohmic contact to p-type semiconductor, including a metal oxide and a binder, wherein the metal oxide is a rhenium oxide or a molybdenum oxide.
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5.发明申请公开(公告)号：US20200076331A1
公开(公告)日：2020-03-05
申请号：US16296218
申请日：2019-03-08
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor： Hyun-Cheol SONG , Chong Yun KANG , Jin Sang KIM , Ji-won CHOI , Seung Hyub BAEK , Seong Keun KIM , Sang Tae KIM , Youn-hwan SHIN
IPC: H02N2/18 , H01L41/053 , H01L41/113 , H01L41/04
Abstract: Provided is a self-resonance tuning piezoelectric energy harvester. The self-resonance tuning piezoelectric energy harvester includes a piezoelectric beam which extends along a horizontal direction, a fixing element which fixes two ends of the piezoelectric beam, and a mass which is connected to the piezoelectric beam movably along the piezoelectric beam, wherein the mass includes a through-hole through which the piezoelectric beam passes, and makes the movement through the through-hole. According to the principle of continuous movement to the resonance position, the mass of the self-resonance tuning piezoelectric energy harvester induces the piezoelectric beam to generate displacement to the maximum and maximize the electricity production capacity of the piezoelectric energy harvester.
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Patent Agency Ranking
公开(公告)号：US20160365501A1
公开(公告)日：2016-12-15
申请号：US15158158
申请日：2016-05-18
Applicant: Korea Institute of Science and Technology
Inventor： Chong Yun KANG , Seok Jin YOON , Jin Sang KIM , Ji-Won CHOI , Seung Hyub BAEK , Seong Keun KIM , Woo-Suk JUNG , Beomjin KWON
IPC: H01L41/053 , H01L41/18 , H01L41/113
CPC classification number: H01L41/113
Abstract: Disclosed is a curved piezoelectric device maximizing an electrical potential of the piezoelectric material corresponding to an external mechanical stress. The curved piezoelectric device includes: a curved substrate; and a piezoelectric material provided on one surface or both surfaces of the curved substrate, wherein when a stress is applied, a neutral plane in which a compressive stress and a tensile stress are balanced is located in the curved substrate, wherein the location of the neutral plane is determined by y1 and y2 of Equation 1 or 2 below, and wherein the location of the neutral plane is controllable by adjusting a thickness (d), a sectional area (A) and a Young's modulus (E) of each of the curved substrate and the piezoelectric material: wherein y 1 = E 2 d 2 ( d 1 + d 2 ) 2 ( E 1 d 1 + E 2 d 2 ) , y 2 = E 1 d 1 ( d 1 + d 2 ) 2 ( E 1 d 1 + E 2 d 2 ) and Equation 1 y 1 = E 2 A 2 ( A 1 + A 2 ) 2 ( E 1 A 1 + E 2 A 2 ) , y 2 = E 1 A 1 ( A 1 + A 2 ) 2 ( E 1 A 1 + E 2 A 2 ) . Equation 2
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公开(公告)号：US20140048796A1
公开(公告)日：2014-02-20
申请号：US13774722
申请日：2013-02-22
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor： Seung Hyub BAEK , Shin Ik KIM , Jin Sang KIM , Ji Won CHOI , Seok Jin YOON , Chong Yun KANG
IPC: H01L29/778 , H01L29/66
CPC classification number: H01L29/778 , H01L29/24 , H01L29/408 , H01L29/516 , H01L29/66969 , H01L29/7786
Abstract: Provided is an oxide electronic device, including: an oxide substrate; an oxide thin film layer formed on the oxide substrate and containing an oxide that is heterogeneous with respect to the oxide substrate; and a ferroelectric layer formed on the oxide thin film layer and controlling electric conductivity of two-dimensional electron gas (2DEG) generated at an interface between the oxide substrate and the oxide thin film layer. Provided also is a method for manufacturing an oxide electronic device, including: depositing, on an oxide substrate, an oxide that is heterogeneous with respect to the oxide substrate to form an oxide thin film layer; and forming a ferroelectric layer on the oxide thin film layer, wherein the ferroelectric layer controls electric conductivity of 2DEG generated at an interface between the oxide substrate and the oxide thin film layer.
Abstract translation: 提供一种氧化物电子器件，包括：氧化物衬底; 氧化物薄膜层，其形成在所述氧化物基板上并且含有相对于所述氧化物基板为异质的氧化物; 以及形成在所述氧化物薄膜层上并且控制在所述氧化物衬底和所述氧化物薄膜层之间的界面处产生的二维电子气（2DEG）的导电性的铁电层。 还提供了一种氧化物电子器件的制造方法，包括：在氧化物衬底上沉积相对于氧化物衬底是异质的氧化物以形成氧化物薄膜层; 以及在所述氧化物薄膜层上形成铁电体层，其中所述铁电体层控制在所述氧化物基板和所述氧化物薄膜层之间的界面处产生的2DEG的导电性。
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8.发明申请HYDROPHOBIC SUBSTRATE WITH ANTI-REFLECTIVE PROPERTY METHOD FOR MANUFACTURING THE SAME, AND SOLAR CELL MODULE INCLUDING THE SAME 审中-公开具有用于制造该反射性物质的方法的疏水性基材和包括其的太阳能电池模块公开(公告)号：US20130199612A1
公开(公告)日：2013-08-08
申请号：US13677733
申请日：2012-11-15
Applicant: Korea Institute of Science and Technology
Inventor： Ho Won JANG , Seok Jin YOON , Deok Ha WOO , Jin Sang KIM , Hyo Jin KWON , Chong Yun KANG , Ji Won CHOI
IPC: H01L31/0232
CPC classification number: H01L31/02327 , B82Y30/00 , C03C17/42 , C03C2217/425 , C03C2217/73 , C03C2217/76 , H01L31/02168 , H01L31/02366 , H02S40/10 , Y02E10/50 , Y10S977/755 , Y10T428/24355
Abstract: Provided are a hydrophobic antireflective substrate, a method for manufacturing the same, and a solar cell module including the same. The hydrophobic antireflective substrate includes: a substrate; a nanostructured layer having nanostructured portions formed on the substrate and nanoporous portions formed between the nanostructured portions; and a hydrophobic coating film formed on the nanostructured portions. The method for manufacturing a hydrophobic antireflective substrate includes: forming a nanostructured layer having nanostructured portions and nanoporous portions formed between the nanostructured portions on a substrate; and forming a hydrophobic coating film on the nanostructured portions. In the hydrophobic antireflective substrate disclosed herein, a porous nanostructured layer is formed on the substrate and a hydrophobic coating film is formed on the nanostructured layer, so that the hydrophobic antireflective substrate has ultra-hydrophobic property corresponding to a large water droplet contact angle.
Abstract translation: 提供了一种疏水性抗反射基板，其制造方法以及包括该防反射基板的太阳能电池模块。 疏水性抗反射基板包括：基板; 具有形成在所述基板上的纳米结构部分和形成在所述纳米结构部分之间的纳米多孔部分的纳米结构层; 以及形成在纳米结构部分上的疏水涂膜。 制造疏水性抗反射基板的方法包括：在基板上形成具有纳米结构部分和形成在纳米结构部分之间的纳米多孔部分的纳米结构层; 并在纳米结构部分上形成疏水性涂膜。 在本文公开的疏水性抗反射基板中，在基板上形成多孔纳米结构化层，在纳米结构层上形成疏水性涂膜，疏水性防反射基板具有对应于大的水滴接触角的超疏水性。
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9.发明公开公开(公告)号：US20240180043A1
公开(公告)日：2024-05-30
申请号：US18511720
申请日：2023-11-16
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor： Seung Hyub BAEK , Min Seok KIM , Ji-Soo JANG , Sunghoon HUR , Jungho YOON , Hyun-Cheol SONG , Seong Keun KIM , Ji-Won CHOI , Jin Sang KIM , Chong Yun KANG
IPC: H10N39/00
CPC classification number: H10N39/00
Abstract: Disclosed is a heterojunction semiconductor flexible substrate in which an epitaxial oxide thin film layer is hetero-bonded to a thinned silicon substrate using a metal layer, a manufacturing method thereof, and the heterojunction semiconductor flexible substrate can be applied to sensor, actuator, transducer, or micro electro mechanical systems (MEMS) device using high functionality of the epitaxial oxide thin film layer of high quality as well as an electronic and/or optical device.
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公开(公告)号：US20220086961A1
公开(公告)日：2022-03-17
申请号：US17475346
申请日：2021-09-15
Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
Inventor： Ji-Won CHOI , Jin Sang KIM , Chong Yun KANG , Seung Hyub BAEK , Seong Keun KIM , Hyun-Cheol SONG , Jungho YOON , Joohee JANG
Abstract: The present disclosure provides a transparent thin film heater including: a metal layer; and a transparent conductive oxide layer, wherein the transparent conductive oxide layer includes a composition represented by the following Chemical Formula 1 and is doped with nitrogen: ZnxSn1−xO2 [Chemical Formula 1] wherein 0
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