公开(公告)号：US08747557B2

公开(公告)日：2014-06-10

申请号：US12381088

申请日：2009-03-05

申请人： Krupakar Murali Subramanian ,  Neal Rueger ,  Gurtej Sandhu

发明人： Krupakar Murali Subramanian ,  Neal Rueger ,  Gurtej Sandhu

IPC分类号： C23C16/00 ,  B05D5/00

CPC分类号： B05B1/14 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/15 ,  H01J37/32366

摘要： The present invention is generally directed to a system for controlling placement of nanoparticles, and methods of using same. In one illustrative embodiment, the device includes a substrate and a plurality of funnels in the substrate, wherein each of the funnels comprises an inlet opening and an elongated, rectangular shaped outlet opening. In one illustrative embodiment, the method includes creating a dusty plasma comprising a plurality of carbon nanotubes, positioning a mask between the dusty plasma and a desired target for the carbon nanotubes, the mask having a plurality of openings extending therethrough, and extinguishing the dusty plasma to thereby allow at least some of the carbon nanotubes in the dusty plasma to pass through at least some of the plurality of openings in the mask and land on the target.

摘要翻译： 本发明一般涉及一种用于控制纳米颗粒的放置的系统及其使用方法。 在一个说明性实施例中，该装置包括衬底和衬底中的多个漏斗，其中每个漏斗包括入口开口和细长的矩形出口。 在一个说明性实施例中，该方法包括产生包含多个碳纳米管的多尘等离子体，将掩模放置在尘埃等离子体和碳纳米管的期望目标之间，掩模具有延伸穿过其中的多个开口，并且熄灭灰尘等离子体 从而允许灰尘等离子体中的至少一些碳纳米管穿过掩模中的多个开口中的至少一些并且落在目标上。

公开(公告)号：US07517558B2

公开(公告)日：2009-04-14

申请号：US11146248

申请日：2005-06-06

申请人： Krupakar Murali Subramanian ,  Neal Rueger ,  Gurtej Sandhu

发明人： Krupakar Murali Subramanian ,  Neal Rueger ,  Gurtej Sandhu

IPC分类号： H05H1/24 ,  B05D1/32 ,  C23C16/00

CPC分类号： B05B1/14 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/15 ,  H01J37/32366

摘要： The present invention is generally directed to a system for controlling placement of nanoparticles, and methods of using same. In one illustrative embodiment, the device includes a substrate and a plurality of funnels in the substrate, wherein each of the funnels comprises an inlet opening and an elongated, rectangular shaped outlet opening. In one illustrative embodiment, the method includes creating a dusty plasma comprising a plurality of carbon nanotubes, positioning a mask between the dusty plasma and a desired target for the carbon nanotubes, the mask having a plurality of openings extending therethrough, and extinguishing the dusty plasma to thereby allow at least some of the carbon nanotubes in the dusty plasma to pass through at least some of the plurality of openings in the mask and land on the target.

摘要翻译： 本发明一般涉及一种用于控制纳米颗粒的放置的系统及其使用方法。 在一个说明性实施例中，该装置包括衬底和衬底中的多个漏斗，其中每个漏斗包括入口开口和细长的矩形出口。 在一个说明性实施例中，该方法包括产生包含多个碳纳米管的多尘等离子体，将掩模放置在尘埃等离子体和碳纳米管的期望目标之间，掩模具有延伸穿过其中的多个开口，并且熄灭灰尘等离子体 从而允许灰尘等离子体中的至少一些碳纳米管穿过掩模中的多个开口中的至少一些并且落在目标上。

公开(公告)号：US20090308312A1

公开(公告)日：2009-12-17

申请号：US12381088

申请日：2009-03-05

申请人： Krupakar Murali Subramanian ,  Neal Rueger ,  Gurtej Sandhu

发明人： Krupakar Murali Subramanian ,  Neal Rueger ,  Gurtej Sandhu

IPC分类号： B05C11/00

CPC分类号： B05B1/14 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/15 ,  H01J37/32366

摘要： The present invention is generally directed to a system for controlling placement of nanoparticles, and methods of using same. In one illustrative embodiment, the device includes a substrate and a plurality of funnels in the substrate, wherein each of the funnels comprises an inlet opening and an elongated, rectangular shaped outlet opening. In one illustrative embodiment, the method includes creating a dusty plasma comprising a plurality of carbon nanotubes, positioning a mask between the dusty plasma and a desired target for the carbon nanotubes, the mask having a plurality of openings extending therethrough, and extinguishing the dusty plasma to thereby allow at least some of the carbon nanotubes in the dusty plasma to pass through at least some of the plurality of openings in the mask and land on the target.

摘要翻译： 本发明一般涉及一种用于控制纳米颗粒的放置的系统及其使用方法。 在一个说明性实施例中，该装置包括衬底和衬底中的多个漏斗，其中每个漏斗包括入口开口和细长的矩形出口。 在一个说明性实施例中，该方法包括产生包含多个碳纳米管的多尘等离子体，将掩模放置在尘埃等离子体和碳纳米管的期望目标之间，掩模具有延伸穿过其中的多个开口，并且熄灭灰尘等离子体 从而允许灰尘等离子体中的至少一些碳纳米管穿过掩模中的多个开口中的至少一些并且落在目标上。

公开(公告)号：US20070138577A1

公开(公告)日：2007-06-21

申请号：US11677923

申请日：2007-02-22

申请人： Gurtej Sandhu ,  John Moore ,  Neal Rueger

发明人： Gurtej Sandhu ,  John Moore ,  Neal Rueger

IPC分类号： H01L29/76 ,  H01L21/8238

CPC分类号： H01L21/02332 ,  H01L21/0234 ,  H01L21/265 ,  H01L21/28061 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/3144 ,  H01L29/513 ,  H01L29/518 ,  H01L29/6659 ,  H01L29/7833

摘要： The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer. Source/drain regions are formed within the semiconductive substrate, and are gatedly connected to one another by the at least one conductive layer. The invention also encompasses transistor structures.

摘要翻译： 本发明包括将氮掺入含氧化硅的层中的方法。 将含氧化硅的层暴露于含氮等离子体中以将氮引入层中。 氮气随后在层内热退火以将至少一些氮与硅结合在层内。 本发明还包括形成晶体管的方法。 在半导体衬底上形成栅氧化层。 栅氧化层包括二氧化硅。 将栅极氧化层暴露于含氮等离子体中以将氮引入层中，并且在暴露期间该层保持在小于或等于400℃。 随后，层内的氮被热退火以将至少大部分氮与硅结合。 在栅极氧化物层上形成至少一个导电层。 源极/漏极区域形成在半导体衬底内，并且通过至少一个导电层彼此门控连接。 本发明还包括晶体管结构。

公开(公告)号：US20050011449A1

公开(公告)日：2005-01-20

申请号：US10916918

申请日：2004-08-12

申请人： Weimin Li ,  Neal Rueger ,  Li Li ,  Ross Dando ,  Kevin Hamer ,  Allen Mardian ,  Gurtej Sandhu

发明人： Weimin Li ,  Neal Rueger ,  Li Li ,  Ross Dando ,  Kevin Hamer ,  Allen Mardian ,  Gurtej Sandhu

IPC分类号： C23C16/44 ,  C23C16/455 ,  C23C16/507 ,  C23C16/00

CPC分类号： C23C16/45565 ,  C23C16/455 ,  C23C16/507

摘要： The present invention is generally directed to a novel gas delivery system for various deposition processes, and various methods of using same. In one illustrative embodiment, a deposition tool comprises a process chamber, a wafer stage adapted for holding a wafer positioned therein, and a gas delivery system positioned in the chamber above a position where a plasma will be generated in the chamber, wherein substantially all of a reactant gas is delivered into the chamber via the gas delivery system. In another illustrative embodiment, the reactant gas exiting the gas delivery system is directed so as to cover substantially all of an area defined by an upper surface of the wafer. In one illustrative embodiment, the method comprises positioning a wafer in a process chamber of a deposition tool, generating a plasma within the process chamber above the wafer, and forming a layer of material above the wafer by introducing substantially all of a reactant gas used to form the layer of material into the process chamber above the plasma via a gas delivery system positioned above the plasma. In another illustrative embodiment, the reactant gas exiting the gas delivery system is directed to cover substantially all of an area defined by an upper surface of the wafer.

摘要翻译： 本发明一般涉及用于各种沉积工艺的新型气体输送系统及其使用方法。 在一个说明性实施例中，沉积工具包括处理室，适于保持位于其中的晶片的晶片台，以及定位在室中的气体输送系统，其位于室内将产生等离子体的位置，其中基本上全部 反应气体通过气体输送系统输送到室中。 在另一说明性实施例中，离开气体输送系统的反应物气体被引导以覆盖由晶片的上表面限定的基本上所有的区域。 在一个示例性实施例中，该方法包括将晶片定位在沉积工具的处理室中，在晶片上方的处理室内产生等离子体，并且通过将基本上所有的反应气体基本上引入到 通过位于等离子体上方的气体输送系统将材料层形成在等离子体上方的处理室中。 在另一示例性实施例中，离开气体输送系统的反应物气体被引导以覆盖由晶片的上表面限定的基本上所有的区域。

公开(公告)号：US20060273456A1

公开(公告)日：2006-12-07

申请号：US11144543

申请日：2005-06-02

申请人： Sanket Sant ,  Gurtej Sandhu ,  Neal Rueger

发明人： Sanket Sant ,  Gurtej Sandhu ,  Neal Rueger

IPC分类号： H01L21/8242 ,  H01L23/48

CPC分类号： H01L21/3088 ,  H01L21/0337 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/76802 ,  H01L27/1052

摘要： Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.

公开(公告)号：US20060218762A1

公开(公告)日：2006-10-05

申请号：US11421701

申请日：2006-06-01

申请人： Gurtej Sandhu ,  Sujit Sharan ,  Neal Rueger ,  Allen Mardian

发明人： Gurtej Sandhu ,  Sujit Sharan ,  Neal Rueger ,  Allen Mardian

IPC分类号： H01L21/00 ,  H01L21/306 ,  C23C16/00

CPC分类号： G01F1/40 ,  G01F1/42 ,  G01P13/0006 ,  G01P13/0013 ,  G01P13/0033 ,  G05D7/0635 ,  Y10T137/0396 ,  Y10T137/7722 ,  Y10T137/775 ,  Y10T137/8242

摘要： Systems and methods are provided for detecting flow in a mass flow controller (MFC). The position of a gate in the MFC is sensed or otherwise determined to monitor flow through the MFC and to immediately or nearly immediately detect a flow failure. In one embodiment of the present invention, a novel MFC is provided. The MFC includes an orifice, a mass flow control gate, an actuator and a gate position sensor. The actuator moves the control gate to control flow through the orifice. The gate position sensor determines the gate position and/or gate movement to monitor flow and immediately or nearly immediately detect a flow failure. According to one embodiment of the present invention, the gate position sensor includes a transmitter for transmitting a signal and a receiver for receiving the signal such that the receiver provides an indication of the position of the gate based on the signal received. Other embodiments of the gate position sensor are described herein, as well as systems and methods that incorporate the novel MFC within a semiconductor manufacturing process.

公开(公告)号：US20060208649A1

公开(公告)日：2006-09-21

申请号：US11083433

申请日：2005-03-17

申请人： Neal Rueger ,  Gurtej Sandhu

发明人： Neal Rueger ,  Gurtej Sandhu

IPC分类号： H01J7/24

CPC分类号： H01J37/3233 ,  H01J37/32366

摘要： A method and system for plasma generation and processing includes a plurality of beam generators each locally controllable and configured for operation upon a single substrate. A control circuit couples to each of the plurality of beam generators with the control circuit configured to independently regulate at least a portion of the plurality of beam generators. A process gas is introduced into an area above a surface of a substrate. A plurality of beam generators is locally controlled and is directed at the process gas. The beam generators independently emit electrons as controlled and at least a portion of the process gas is converted into plasma according to the electrons emitted from the plurality of the independently controllable beam generators. The substrate is processed using the plasma according to local control of each of the plurality of beam generators.

摘要翻译： 用于等离子体产生和处理的方法和系统包括多个光束发生器，每个光束发生器可局部地可控制并且被配置为在单个衬底上操作。 控制电路耦合到多个光束发生器中的每一个，控制电路被配置为独立地调节多个光束发生器的至少一部分。 将工艺气体引入衬底表面上方的区域。 多个束发生器被局部控制并且被引导到处理气体。 束发生器独立地发射受电子的电子，并且至少一部分处理气体根据从多个可独立控制的光束发生器发射的电子转换为等离子体。 根据多个光束发生器中的每一个的局部控制，使用等离子体处理衬底。

公开(公告)号：US20060223204A1

公开(公告)日：2006-10-05

申请号：US11421704

申请日：2006-06-01

申请人： Gurtej Sandhu ,  Sujit Sharan ,  Neal Rueger ,  Allen Mardian

发明人： Gurtej Sandhu ,  Sujit Sharan ,  Neal Rueger ,  Allen Mardian

IPC分类号： H01L21/66 ,  G01R31/26

CPC分类号： G01F1/40 ,  G01F1/42 ,  G01P13/0006 ,  G01P13/0013 ,  G01P13/0033 ,  G05D7/0635 ,  Y10T137/0396 ,  Y10T137/7722 ,  Y10T137/775 ,  Y10T137/8242

摘要： Systems and methods are provided for detecting flow in a mass flow controller (MFC). The position of a gate in the MFC is sensed or otherwise determined to monitor flow through the MFC and to immediately or nearly immediately detect a flow failure. In one embodiment of the present invention, a novel MFC is provided. The MFC includes an orifice, a mass flow control gate, an actuator and a gate position sensor. The actuator moves the control gate to control flow through the orifice. The gate position sensor determines the gate position and/or gate movement to monitor flow and immediately or nearly immediately detect a flow failure. According to one embodiment of the present invention, the gate position sensor includes a transmitter for transmitting a signal and a receiver for receiving the signal such that the receiver provides an indication of the position of the gate based on the signal received. Other embodiments of the gate position sensor are described herein, as well as systems and methods that incorporate the novel MFC within a semiconductor manufacturing process.

公开(公告)号：US20070037341A1

公开(公告)日：2007-02-15

申请号：US11200694

申请日：2005-08-10

申请人： Neal Rueger ,  Gurtej Sandhu

发明人： Neal Rueger ,  Gurtej Sandhu

IPC分类号： H01L29/30 ,  H01L21/8238 ,  H01L21/336

CPC分类号： H01L21/76224 ,  H01L21/7624 ,  H01L27/10844 ,  H01L27/11521 ,  H01L29/7833

摘要： A method suitable for use during fabrication of a semiconductor device such as a dynamic random access memory or a flash programmable read-only memory comprises etching through silicon nitride and pad oxide layers and into a semiconductor wafer to form a trench into the wafer. A shallow trench isolation (STI) layer is formed in the opening in the silicon nitride and in the trench in the wafer which will, under certain conditions, form with an undesirable void. The silicon nitride and pad oxide layers are removed, then an epitaxial silicon layer is formed on the silicon wafer between the STI. A gate/tunnel oxide layer is formed on the epitaxial silicon layer, then a word line is formed over the gate/tunnel oxide. The epitaxial silicon layer ensures that some minimum distance is maintained between the gate/tunnel oxide and the void in the STI. Wafer processing may then be continued to form a completed semiconductor device.