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公开(公告)号：US08665250B2
公开(公告)日：2014-03-04
申请号：US13051601
申请日：2011-03-18
Applicant: Kuan-Yu Chen , Wei-Cheng Lin
Inventor： Kuan-Yu Chen , Wei-Cheng Lin
IPC: G06F3/038
Abstract: A shift register circuit includes plural stages of shift registers. Each stage of shift register includes a pull-up circuit, a control signal generator and a voltage-stabilizing circuit. The pull-up circuit is used for charging a first node. The control signal generator is electrically connected with the first node. According to a voltage level of the first node, a corresponding control signal is outputted from an output terminal of the control signal generator. The voltage-stabilizing circuit is electrically connected with the output terminal of the control signal generator for stabilizing the control signal from the control signal generator. Some circuits of some other shift registers are controlled according to the control signal.
Abstract translation: 移位寄存器电路包括多级移位寄存器。 移位寄存器的每一级包括上拉电路，控制信号发生器和稳压电路。 上拉电路用于对第一节点充电。 控制信号发生器与第一节点电连接。 根据第一节点的电压电平，从控制信号发生器的输出端子输出相应的控制信号。 电压稳定电路与控制信号发生器的输出端子电连接，用于稳定来自控制信号发生器的控制信号。 一些其他移位寄存器的某些电路根据控制信号进行控制。
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公开(公告)号：US10930874B2
公开(公告)日：2021-02-23
申请号：US16794255
申请日：2020-02-19
Applicant: Kuan-Yu Chen , Hsiao-Lung Lin
Inventor： Kuan-Yu Chen , Hsiao-Lung Lin
Abstract: An organic light emitting display device including a substrate, an anode, a hole transport layer, a cathode, an electron transport layer and an organic light emitting layer is provided. The anode is located on the substrate. The hole transport layer is located on the anode. The cathode is located on the substrate. The electron transport layer is located on the cathode. The organic light emitting layer is located between the hole transport layer and the electron transport layer. A vertical projection of the anode on the substrate is not overlapped with a vertical projection of the cathode on the substrate.
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公开(公告)号：US20160349989A1
公开(公告)日：2016-12-01
申请号：US15098324
申请日：2016-04-14
Applicant: Feng-Yi Yu , Chia-Shin Weng , Hsin-Pei Tsai , Jih-Houng Lee , Kuan-Yu Chen
Inventor： Feng-Yi Yu , Chia-Shin Weng , Hsin-Pei Tsai , Jih-Houng Lee , Kuan-Yu Chen
IPC: G06F3/0488 , G06F3/0484 , G06F3/0489 , G06F3/041 , G06F3/147
CPC classification number: G06F3/04886 , G06F3/03547 , G06F3/0362 , G06F3/041 , G06F3/04847 , G06F3/04883 , G06F3/04897 , G06F3/147 , G06F2203/04803 , G09G5/14
Abstract: An electronic apparatus and an operating method of the electronic apparatus are provided. The electronic apparatus includes a display unit, a base, a touch pad and a processing unit. The base is coupled to the display unit. The touch pad is disposed on the base, includes touch areas and receives a touch action performed by the user on any touch area. The processing unit is coupled to the touch pad and sets a display frame of the display unit into display areas according to a position of each touch area, so that each touch area has the corresponding display area at a corresponding position on the display unit. After the touch pad received a first touch event, the processing unit obtains a first touch area where the first touch event is generated, and displays a first user interface in a first display area corresponding to the first touch area.
Abstract translation: 提供电子设备的电子设备和操作方法。 电子设备包括显示单元，基座，触摸板和处理单元。 基座耦合到显示单元。 触摸板设置在基座上，包括触摸区域并且在任何触摸区域上接收由用户执行的触摸动作。 处理单元耦合到触摸板，并且根据每个触摸区域的位置将显示单元的显示框架设置为显示区域，使得每个触摸区域在显示单元上的对应位置具有对应的显示区域。 在触摸板接收到第一触摸事件之后，处理单元获得生成第一触摸事件的第一触摸区域，并且在对应于第一触摸区域的第一显示区域中显示第一用户界面。
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公开(公告)号：US09054821B2
公开(公告)日：2015-06-09
申请号：US14135593
申请日：2013-12-20
Applicant: Kuan-Yu Chen , Yuan-Min Hu
Inventor： Kuan-Yu Chen , Yuan-Min Hu
Abstract: An apparatus and a method for frequency locking are provided. The apparatus includes a phase-locked loop (PLL), a local clock generator, a data buffer unit and a control unit. The PLL locks the phase and the frequency of a radio frequency signal to generate a recovery clock signal and received data. The data buffer unit writes the received data into an elastic buffer of the data buffer unit according to the frequency of the recovery clock signal, and reads the received data from the elastic buffer according to the frequency of a local clock signal generated by the local clock generator. The control unit obtains a write-in address and a read-out address in the elastic buffer, and sends a control signal to the local clock generator for adjusting the frequency of the local clock signal according to relationship between the write-in address and the read-out address.
Abstract translation: 提供一种用于频率锁定的装置和方法。 该装置包括锁相环（PLL），本地时钟发生器，数据缓冲器单元和控制单元。 PLL锁定射频信号的相位和频率以产生恢复时钟信号和接收的数据。 数据缓冲器单元根据恢复时钟信号的频率将接收到的数据写入数据缓冲器单元的弹性缓冲器，并根据由本地时钟产生的本地时钟信号的频率从弹性缓冲器读取接收的数据 发电机。 控制单元在弹性缓冲器中获得写入地址和读出地址，并且根据写入地址和写入地址之间的关系向本地时钟发生器发送控制信号以调整本地时钟信号的频率 读出地址。
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公开(公告)号：US20140182914A1
公开(公告)日：2014-07-03
申请号：US13727701
申请日：2012-12-27
Applicant: Kuan-Yu Chen , Howard L. Heck
Inventor： Kuan-Yu Chen , Howard L. Heck
CPC classification number: H05K1/11 , H01R12/57 , H01R12/58 , H05K1/025 , H05K1/0269 , H05K1/0271 , H05K1/111 , H05K1/115 , H05K2201/094 , H05K2201/09409 , H05K2201/10189 , H05K2201/10659 , H05K2201/2045 , H05K2203/163 , Y10T29/49124
Abstract: A universal serial bus hybrid footprint design is described herein. The design includes an outer row of one or more surface mount technology (SMT) contacts and an inner row of one or more printed through holes (PTH). The hybrid footprint design enables a data through put of at least 10 Gbps.
Abstract translation: 本文描述了通用串行总线混合覆盖设计。 该设计包括一排或多个表面贴装技术（SMT）触点和一列或多个印刷通孔（PTH）的内排。 混合足迹设计能够通过至少10 Gbps的数据进行数据传输。
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Patent Agency Ranking
6.发明授权公开(公告)号：US08724762B2
公开(公告)日：2014-05-13
申请号：US13175884
申请日：2011-07-04
Applicant: Yen-Yin Huang , Chauo-Min Chen , Kuan-Yu Chen , Yu-Sheng Yi , Ming-Shih Yu
Inventor： Yen-Yin Huang , Chauo-Min Chen , Kuan-Yu Chen , Yu-Sheng Yi , Ming-Shih Yu
IPC: H04L7/00
Abstract: A clock regeneration method, for generating a clock signal for being utilized by a receiver/transceiver/receiver system/transceiver system, includes: performing data/pattern detection on at least one input signal to generate recovered data; detecting at least one synchronization pattern in the input signal according to a synchronization pattern rule, and generating a synchronization signal corresponding to the synchronization pattern; and performing frequency-locking on the synchronization signal to generate the clock signal. More particularly, the step of detecting the at least one synchronization pattern in the input signal according to the synchronization pattern rule further comprises: detecting the at least one synchronization pattern by performing synchronization pattern detection on the recovered data. An associated reference-less receiver and an associated crystal-less system are also provided.
Abstract translation: 一种用于产生由接收器/收发器/收发器/收发器系统使用的时钟信号的时钟再生方法包括：对至少一个输入信号执行数据/模式检测以产生恢复的数据; 根据同步模式规则检测所述输入信号中的至少一个同步模式，并产生与所述同步模式对应的同步信号; 对该同步信号进行频率锁定，生成时钟信号。 更具体地，根据同步模式规则检测输入信号中的至少一个同步模式的步骤还包括：通过对恢复的数据执行同步模式检测来检测至少一个同步模式。 还提供了相关联的无参考接收器和相关联的无晶体系统。
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公开(公告)号：US20130176523A1
公开(公告)日：2013-07-11
申请号：US13346899
申请日：2012-01-10
Applicant: Kuan-Yu Chen , Tien-Lun Ting , Chien-Huang Liao
Inventor： Kuan-Yu Chen , Tien-Lun Ting , Chien-Huang Liao
IPC: G02F1/1343
CPC classification number: G02F1/134363 , G02F2201/124 , G02F2203/30
Abstract: In one aspect of the invention, a liquid crystal display device includes a pixel matrix having a plurality of pixels. Each pixel includes a first pixel electrode having a plurality of first pixel electrode stripes and a second pixel electrode having a plurality of second pixel electrode stripes. The first pixel electrode stripes and the second pixel electrode stripes are alternately placed to define a plurality of pitches therebetween. Each pixel is defined between two adjacent first pixel electrode and second pixel electrode stripes, and has a width. In one embodiment, the width of at least one of the pitches is different from that of the other pitches. In another embodiment, the width of each pitch is variable along the adjacent first pixel electrode and second pixel electrode stripes.
Abstract translation: 在本发明的一个方面中，液晶显示装置包括具有多个像素的像素矩阵。 每个像素包括具有多个第一像素电极条的第一像素电极和具有多个第二像素电极条的第二像素电极。 第一像素电极条和第二像素电极条交替放置以在它们之间限定多个间距。 每个像素被限定在两个相邻的第一像素电极和第二像素电极条之间，并具有宽度。 在一个实施例中，至少一个间距的宽度与其它间距的宽度不同。 在另一个实施例中，每个间距的宽度沿着相邻的第一像素电极和第二像素电极条可变。
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8.发明申请公开(公告)号：US20130010909A1
公开(公告)日：2013-01-10
申请号：US13175884
申请日：2011-07-04
Applicant: Yen-Yin Huang , Chauo-Min Chen , Kuan-Yu Chen , Yu-Sheng Yi , Ming-Shih Yu
Inventor： Yen-Yin Huang , Chauo-Min Chen , Kuan-Yu Chen , Yu-Sheng Yi , Ming-Shih Yu
IPC: H04L7/00
Abstract: A clock regeneration method, for generating a clock signal for being utilized by a receiver/transceiver/receiver system/transceiver system, includes: performing data/pattern detection on at least one input signal to generate recovered data; detecting at least one synchronization pattern in the input signal according to a synchronization pattern rule, and generating a synchronization signal corresponding to the synchronization pattern; and performing frequency-locking on the synchronization signal to generate the clock signal. More particularly, the step of detecting the at least one synchronization pattern in the input signal according to the synchronization pattern rule further comprises: detecting the at least one synchronization pattern by performing synchronization pattern detection on the recovered data. An associated reference-less receiver and an associated crystal-less system are also provided.
Abstract translation: 一种用于产生由接收器/收发器/收发器/收发器系统使用的时钟信号的时钟再生方法包括：对至少一个输入信号执行数据/模式检测以产生恢复的数据; 根据同步模式规则检测所述输入信号中的至少一个同步模式，并产生与所述同步模式对应的同步信号; 对该同步信号进行频率锁定，生成时钟信号。 更具体地，根据同步模式规则检测输入信号中的至少一个同步模式的步骤还包括：通过对恢复的数据执行同步模式检测来检测至少一个同步模式。 还提供了相关联的无参考接收器和相关联的无晶体系统。
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公开(公告)号：US20130001705A1
公开(公告)日：2013-01-03
申请号：US13608961
申请日：2012-09-10
Applicant: Chien-Chang Su , Tsz-Mei Kwok , Hsien-Hsin Lin , Hsueh-Chang Sung , Yi-Fang Pai , Kuan-Yu Chen
Inventor： Chien-Chang Su , Tsz-Mei Kwok , Hsien-Hsin Lin , Hsueh-Chang Sung , Yi-Fang Pai , Kuan-Yu Chen
IPC: H01L29/78
CPC classification number: H01L29/66795 , H01L21/02532 , H01L21/02636 , H01L21/823431 , H01L21/823821 , H01L29/785
Abstract: A method of forming an integrated circuit structure includes providing a wafer including a substrate and a semiconductor fin at a major surface of the substrate, and performing a deposition step to epitaxially grow an epitaxy layer on a top surface and sidewalls of the semiconductor fin, wherein the epitaxy layer includes a semiconductor material. An etch step is then performed to remove a portion of the epitaxy layer, with a remaining portion of the epitaxy layer remaining on the top surface and the sidewalls of the semiconductor fin.
Abstract translation: 一种形成集成电路结构的方法包括在衬底的主表面上提供包括衬底和半导体鳍片的晶片，并且执行沉积步骤以在半导体鳍片的顶表面和侧壁上外延生长外延层，其中 外延层包括半导体材料。 然后执行蚀刻步骤以去除外延层的一部分，其中外延层的剩余部分保留在半导体鳍片的顶表面和侧壁上。
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10.发明授权Circuit for amplifying a display signal to be transmitted to a repair line by using a non-inverting amplifier and LCD device using the same 有权用于通过使用同相放大器和使用其的LCD装置放大要发送到修复线的显示信号的电路公开(公告)号：US08334828B2
公开(公告)日：2012-12-18
申请号：US13182637
申请日：2011-07-14
Applicant: Feng-Shou Lin , Kuan-Yu Chen , Kuo-Liang Shen , Chien-Yu Yi
Inventor： Feng-Shou Lin , Kuan-Yu Chen , Kuo-Liang Shen , Chien-Yu Yi
IPC: G09G3/36
CPC classification number: G09G3/3688 , G09G2300/0426 , G09G2330/08
Abstract: A circuit for amplifying a display signal transmitted to a repair line by using a non-inverting amplifier is disclosed, which comprises a voltage follower, a non-inverting amplifier, a repair line, a thin film transistor (TFT) and a liquid crystal (LC) capacitor. The voltage follower is electrically connected to a data driver chip to thereby provide a display signal to the non-inverting amplifier. The non-inverting amplifier amplifies the display signal to thus obtain an amplified display signal, and transmits the amplified display signal to the TFT and the LC capacitor through the repair line. The amplified display signal is kept at a desired voltage level when the LC capacitor receives the amplified display signal.
Abstract translation: 公开了一种用于放大通过使用非反相放大器传输到维修线的显示信号的电路，其包括电压跟随器，非反相放大器，修复线，薄膜晶体管（TFT）和液晶（ LC）电容器。 电压跟随器电连接到数据驱动器芯片，从而向非反相放大器提供显示信号。 非反相放大器放大显示信号，从而获得放大的显示信号，并通过修复线将放大的显示信号发送到TFT和LC电容器。 当LC电容器接收放大的显示信号时，放大的显示信号保持在期望的电压电平。
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