File system configured to support variable density storage and data
compression within a nonvolatile memory
    1.
    发明授权
    File system configured to support variable density storage and data compression within a nonvolatile memory 失效
    文件系统被配置为支持非易失性存储器内的可变密度存储和数据压缩

    公开(公告)号:US5802553A

    公开(公告)日:1998-09-01

    申请号:US574646

    申请日:1995-12-19

    摘要: A storage system contains a solid state disk drive having a plurality of memory cells to store the files, including file system control information and data. In a high density mode, the solid state disk drive stores more than one bit per memory cell, and in a reliable mode, the solid state disk drive stores one bit per cell. A file configuration system stores file system control information in the reliable mode and stores data, when specified, in the high density mode. The file configuration system includes a multi-level cell extension unit that generates commands to the memory cells. A data compression unit is provided to compress file data. A block size for the data compression unit is calculated in accordance with the number of bits per cell stored in the high density mode. The file configuration system further includes an error detection and correction (EDC) unit to detect and correct data stored in the high density mode. The storage system may be implemented to operate with the personal computer memory card industry association (PCMCIA) standard.

    摘要翻译: 存储系统包含具有存储文件的多个存储单元的固态磁盘驱动器,包括文件系统控制信息和数据。 在高密度模式下,固态磁盘驱动器每个存储单元存储多于一个位,并且在可靠模式下,固态磁盘驱动器存储每个单元一位。 文件配置系统将文件系统控制信息存储在可靠模式中,并且在指定的情况下以高密度模式存储数据。 文件配置系统包括向存储器单元生成命令的多级单元扩展单元。 提供数据压缩单元来压缩文件数据。 根据以高密度模式存储的每个单元的比特数来计算数据压缩单元的块大小。 文件配置系统还包括用于检测和校正以高密度模式存储的数据的错误检测和校正(EDC)单元。 存储系统可以被实现为与个人计算机存储卡行业协会(PCMCIA)标准一起操作。

    Block-erasable non-volatile semiconductor memory which tracks and stores
the total number of write/erase cycles for each block
    3.
    发明授权
    Block-erasable non-volatile semiconductor memory which tracks and stores the total number of write/erase cycles for each block 失效
    块可擦除非易失性半导体存储器,其跟踪并存储每个块的写入/擦除周期的总数

    公开(公告)号:US5544356A

    公开(公告)日:1996-08-06

    申请号:US400272

    申请日:1995-03-03

    摘要: A non-volatile semiconductor memory that is erasable only in blocks is described. Each bit of the non-volatile semiconductor memory cannot be overwritten from a first logical state to a second logical state without a prior erasure. Each bit of the non-volatile semiconductor memory can be overwritten from a second logical state to a first logical state without a prior erasure. The non-volatile semiconductor memory comprises an active block for storing a first file, a reserve block for storing a second file, and a directory block. The second file is a copy of the first file. The copy is made during a clean-up operation prior to erasure of the active block. The directory block comprises a directory entry for identifying the first file.

    摘要翻译: 描述了仅在块中可擦除的非易失性半导体存储器。 不存在先前的擦除,非易失性半导体存储器的每一位都不能被从第一逻辑状态重写到第二逻辑状态。 可以将非易失性半导体存储器的每一位从第二逻辑状态重写到第一逻辑状态,而无需先前擦除。 非易失性半导体存储器包括用于存储第一文件的活动块,用于存储第二文件的预留块和目录块。 第二个文件是第一个文件的副本。 在擦除活动块之前,在清理操作期间进行复印。 目录块包括用于识别第一文件的目录条目。

    Flash memory card including plural flash memories and circuitry for
selectively outputting ready/busy signals in different operating modes
    4.
    发明授权
    Flash memory card including plural flash memories and circuitry for selectively outputting ready/busy signals in different operating modes 失效
    闪存卡包括多个闪存和用于在不同操作模式下选择性地输出就绪/忙信号的电路

    公开(公告)号:US5388248A

    公开(公告)日:1995-02-07

    申请号:US198789

    申请日:1994-02-16

    CPC分类号: G11C16/10 G11C16/102

    摘要: A flash memory card is described which has a plurality of flash memories, each having a ready/busy output for indicating whether its respective one of the plurality of flash memories is busy or ready. A register circuit is provided for storing a plurality of mask data. A mode circuit is provided for choosing one of a first mode and a second mode, wherein a first mode signal is produced if the first mode is chosen and a second mode signal is produced if the second mode is chosen. A logic circuit is provided for performing logical operations with respect to the ready/busy output for each of the plurality of flash memories and the mask data in accordance with whether the first mode signal or the second mode signal is produced. If the first mode is chosen, the logic circuit produces a ready signal output for the flash memory card only if the ready/busy output of all the plurality of flash memories is ready. If the second mode is chosen, the logic circuit produces a ready signal output for the flash memory card each time any flash memory goes from being busy to being ready.

    摘要翻译: 描述了一种闪存卡,其具有多个闪速存储器,每个闪速存储器具有用于指示其相应的一个闪存是忙还是准备好的就绪/忙输出。 提供了一种用于存储多个掩模数据的寄存器电路。 提供了用于选择第一模式和第二模式之一的模式电路,其中如果选择了第一模式,则产生第一模式信号,并且如果选择了第二模式,则产生第二模式信号。 提供逻辑电路,用于根据是否产生第一模式信号或第二模式信号,针对多个闪速存储器中的每一个和掩模数据执行关于就绪/忙输出的逻辑运算。 如果选择第一模式,则只有当所有多个闪存的就绪/忙输出准备就绪时,逻辑电路才会为闪存卡产生就绪信号输出。 如果选择第二模式,则每当闪存从忙到准备状态时,逻辑电路就为闪存卡产生就绪信号输出。

    Interface for flash EEPROM memory arrays
    6.
    发明授权
    Interface for flash EEPROM memory arrays 失效
    闪存EEPROM存储器阵列接口

    公开(公告)号:US06279069B1

    公开(公告)日:2001-08-21

    申请号:US08773169

    申请日:1996-12-26

    IPC分类号: G06F1200

    CPC分类号: G11C16/06 G11C16/20

    摘要: A flash EEPROM memory device including a plurality of blocks of flash EEPROM memory cells arranged to be accessed in rows and columns, a query memory storing data defining characteristics of the flash memory device that may be used to initialize software device drivers for accessing the device, and an interface for receiving data and commands addressed to the blocks of flash EEPROM memory cells and generating signals for affecting the purpose of the commands in the flash EEPROM memory device, the interface adapted to receive a command scaled to a range of characteristics of a particular flash EEPROM memory device and respond by returning the data stored in the query memory as output depending on characteristics of the particular flash EEPROM memory device.

    摘要翻译: 一种闪存EEPROM存储器件,包括布置成以行和列进行访问的多个快闪EEPROM存储器单元块;查询存储器,存储定义可用于初始化软件设备驱动程序以访问设备的闪速存储器件的特性的数据; 以及接口,用于接收寻址到快闪EEPROM存储器单元的块的数据和命令,并且产生用于影响闪存EEPROM存储器件中的命令的目的的信号,该接口适于接收缩放到特定范围的特征范围的命令 闪存EEPROM存储器件,并根据特定的闪存EEPROM存储器件的特性返回存储在查询存储器中的数据作为输出。

    Power budgetting in a computer system having removable devices
    7.
    发明授权
    Power budgetting in a computer system having removable devices 失效
    具有可移动设备的计算机系统中的功率预算

    公开(公告)号:US5532945A

    公开(公告)日:1996-07-02

    申请号:US261447

    申请日:1994-06-17

    申请人: Kurt B. Robinson

    发明人: Kurt B. Robinson

    CPC分类号: G06F1/3215 G11C5/14

    摘要: A computer system with power budgeting for removable devices is disclosed comprising a nonvolatile memory that contains a power resource table for storing a power consumption indication for at least one resident device for the computer system. The computer system further comprises a removable device that contains a card information structure that stores a power consumption indication for the removable device. A processor executes a power management driver that allocates a power budget to the removable device according to the power resource table and the card information structure. The power management driver updates the power: resource table to indicate the power budget to the removable device.

    摘要翻译: 公开了一种具有用于可移动设备的功率预算的计算机系统,包括:非易失性存储器,其包含用于存储用于所述计算机系统的至少一个驻留设备的功率消耗指示的功率资源表。 计算机系统还包括可移动设备,其包含存储可移除设备的功耗指示的卡信息结构。 处理器执行功率管理驱动器,其根据功率资源表和卡信息结构向可移动设备分配功率预算。 电源管理驱动程序更新power:资源表以指示可移动设备的功率预算。

    Flash memory card including circuitry for selectively providing masked
and unmasked ready/busy output signals
    8.
    发明授权
    Flash memory card including circuitry for selectively providing masked and unmasked ready/busy output signals 失效
    闪存卡包括用于选择性地提供屏蔽和未屏蔽的就绪/忙碌输出信号的电路

    公开(公告)号:US5379401A

    公开(公告)日:1995-01-03

    申请号:US198134

    申请日:1994-02-16

    CPC分类号: G11C16/10 G11C16/102

    摘要: A flash memory card is described which includes a first flash memory and a second flash memory. The first flash memory includes an unmasked first output that enters a first state if the first flash memory is ready and a second state if the first flash memory is busy. The second flash memory includes an unmasked second output that enters the first state if the second flash memory is ready and the second state if the second flash memory is busy. The flash memory card also includes a circuit for selectively providing one of (1) a masked first output (2) the unmasked first output, (3) a masked second output, and (4) the unmasked second output. A latch provides a first ready output signal for the flash memory card. The first ready output signal indicates a first transition from the second state to the first state by one of the unmasked first output of the first flash memory and the unmasked second output of the second flash memory. A circuit is also provided for clearing the first ready output signal from the latch.

    摘要翻译: 描述了包括第一闪存和第二闪存的闪存卡。 第一闪速存储器包括未屏蔽的第一输出,如果第一闪速存储器就绪,则进入第一状态,如果第一闪存正忙,则其进入第二状态。 第二闪速存储器包括未屏蔽的第二输出,如果第二闪速存储器准备就进入第一状态,如果第二闪速存储器正忙,则其进入第二状态。 闪存卡还包括用于选择性地提供(1)屏蔽的第一输出(2)未屏蔽的第一输出,(3)屏蔽的第二输出和(4)未屏蔽的第二输出之一的电路。 锁存器为闪存卡提供第一个就绪输出信号。 第一准备输出信号指示第一闪速存储器的未屏蔽的第一输出和第二闪存的未屏蔽的第二输出之一从第二状态到第一状态的第一转换。 还提供用于清除来自锁存器的第一就绪输出信号的电路。

    Systems and methods involving features of adaptive and/or autonomous traffic control
    9.
    发明授权
    Systems and methods involving features of adaptive and/or autonomous traffic control 有权
    涉及自适应和/或自主流量控制特征的系统和方法

    公开(公告)号:US08825350B1

    公开(公告)日:2014-09-02

    申请号:US13369233

    申请日:2012-02-08

    申请人: Kurt B. Robinson

    发明人: Kurt B. Robinson

    摘要: Systems and method are disclosed for adaptive and/or autonomous traffic control. In one illustrative implementation, there is provided a method for processing traffic information. Moreover, the method may include receiving data regarding travel of vehicles associated with an intersection, using neural network technology to recognize types and/or states of traffic, and using the neural network technology to process/determine/memorize optimal traffic flow decisions as a function of experience information. Exemplary implementations may also include using the neural network technology to achieve efficient traffic flow via recognition of the optimal traffic flow decisions.

    摘要翻译: 公开了用于自适应和/或自主交通控制的系统和方法。 在一个说明性实现中,提供了一种用于处理交通信息的方法。 此外,该方法可以包括接收关于与交叉点相关联的车辆的行驶的数据,使用神经网络技术来识别交通的类型和/或状态,并且使用神经网络技术来处理/确定/记住最佳交通流决策作为一个功能 的经验信息。 示例性实现还可以包括使用神经网络技术来通过识别最佳业务流决策来实现有效的业务流。

    Managing file structures for a flash memory file system in a computer
    10.
    发明授权
    Managing file structures for a flash memory file system in a computer 失效
    管理计算机中闪存文件系统的文件结构

    公开(公告)号:US5682497A

    公开(公告)日:1997-10-28

    申请号:US629762

    申请日:1996-04-08

    申请人: Kurt B. Robinson

    发明人: Kurt B. Robinson

    IPC分类号: G06F3/06 G06F12/02 G06F12/00

    摘要: A method for compressing a set of file structures in a flash memory subsystem is disclosed. During a clean-up operation, a sibling chain of the file structures stored in a logical block of the flash memory subsystem is traversed. If a file structure is followed by deleted file structures in the sibling chain, then the file structure is transferred to a spare logical block and the sibling pointer of the file structure is programmed bypass the deleted file structures. If a deleted file structure in the sibling chain is referenced by a previous file structure in the sibling chain, then the deleted file structure is transferred to the logical block and recycled.

    摘要翻译: 公开了一种用于压缩闪存子系统中的一组文件结构的方法。 在清理操作期间,遍历存储在闪存子系统的逻辑块中的文件结构的兄弟链。 如果文件结构后面是同级链中已删除的文件结构,则将文件结构传输到备用逻辑块,并将文件结构的同级指针绕过已删除的文件结构进行编程。 如果兄弟链中已删除的文件结构由同级链中的先前文件结构引用,则将删除的文件结构传输到逻辑块并进行再循环。