公开(公告)号：US08455985B2

公开(公告)日：2013-06-04

申请号：US13019520

申请日：2011-02-02

申请人： Kyu-hee Han ,  Sang-hoon Ahn ,  Eunkee Hong

发明人： Kyu-hee Han ,  Sang-hoon Ahn ,  Eunkee Hong

IPC分类号： H01L29/00

CPC分类号： H01L23/562 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/76801 ,  H01L21/76825 ,  H01L23/5258 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L24/04 ,  H01L24/05 ,  H01L24/16 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05557 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16145 ,  H01L2224/16245 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/14 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： An integrated circuit device includes a plurality of stacked circuit layers, at least one of the plurality of circuit layers including a composite interlayer insulation layer including laterally adjacent first and second insulating material regions having different mechanical strengths and dielectric properties and a plurality of circuit components disposed in the composite interlayer insulation layer. The first insulating material region may have a lower dielectric constant and a lower mechanical strength than the second insulating material region such that, for example, the first insulating material region may be positioned near signal lines or other circuit features to reduce capacitance while using the second insulating material region near a location that is susceptible to localized mechanical stress, such as a fuse location, an external connection bonding location or a scribe line location.

摘要翻译： 集成电路器件包括多个堆叠电路层，所述多个电路层中的至少一个包括复合层间绝缘层，所述复合层间绝缘层包括具有不同机械强度和介电特性的横向相邻的第一和第二绝缘材料区域，以及设置的多个电路部件 在复合层间绝缘层中。 第一绝缘材料区域可以具有比第二绝缘材料区域更低的介电常数和更低的机械强度，使得例如第一绝缘材料区域可以位于信号线附近或其他电路特征处以在使用第二绝缘材料区域时降低电容 绝缘材料区域靠近容易受到局部机械应力的位置，诸如熔断器位置，外部连接接合位置或划线位置。

公开(公告)号：US20110241184A1

公开(公告)日：2011-10-06

申请号：US13019520

申请日：2011-02-02

申请人： Kyu-hee Han ,  Sang-hoon Ahn ,  Eunkee Hong

发明人： Kyu-hee Han ,  Sang-hoon Ahn ,  Eunkee Hong

IPC分类号： H01L29/00

CPC分类号： H01L23/562 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/76801 ,  H01L21/76825 ,  H01L23/5258 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L24/04 ,  H01L24/05 ,  H01L24/16 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05557 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16145 ,  H01L2224/16245 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/14 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： An integrated circuit device includes a plurality of stacked circuit layers, at least one of the plurality of circuit layers including a composite interlayer insulation layer including laterally adjacent first and second insulating material regions having different mechanical strengths and dielectric properties and a plurality of circuit components disposed in the composite interlayer insulation layer. The first insulating material region may have a lower dielectric constant and a lower mechanical strength than the second insulating material region such that, for example, the first insulating material region may be positioned near signal lines or other circuit features to reduce capacitance while using the second insulating material region near a location that is susceptible to localized mechanical stress, such as a fuse location, an external connection bonding location or a scribe line location.

摘要翻译： 集成电路器件包括多个堆叠电路层，所述多个电路层中的至少一个包括复合层间绝缘层，所述复合层间绝缘层包括具有不同机械强度和介电特性的横向相邻的第一和第二绝缘材料区域，以及设置的多个电路部件 在复合层间绝缘层中。 第一绝缘材料区域可以具有比第二绝缘材料区域更低的介电常数和更低的机械强度，使得例如第一绝缘材料区域可以位于信号线附近或其他电路特征处以在使用第二绝缘材料区域时降低电容 绝缘材料区域靠近容易受到局部机械应力的位置，诸如熔断器位置，外部连接接合位置或划线位置。

公开(公告)号：US20120094437A1

公开(公告)日：2012-04-19

申请号：US13235717

申请日：2011-09-19

申请人： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Baek ,  Kyoung-hee Kim ,  Byung-lyul Park ,  Byung-hee Kim

发明人： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Baek ,  Kyoung-hee Kim ,  Byung-lyul Park ,  Byung-hee Kim

IPC分类号： H01L21/50 ,  H01L21/768

CPC分类号： H01L23/481 ,  H01L21/76801 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76898 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A method of forming through silicon vias (TSVs) includes forming a primary via hole in a semiconductor substrate, depositing low-k dielectric material in the primary via hole, forming a secondary via hole by etching the low-k dielectric in the primary via hole, in such a manner that a via insulating layer and an inter metal dielectric layer of the low-k dielectric layer are simultaneously formed. The via insulating layer is formed of the low-k dielectric material on sidewalls and a bottom surface of the substrate which delimit the primary via hole and the inter metal dielectric layer is formed on an upper surface of the substrate. Then a metal layer is formed on the substrate including in the secondary via hole, and the metal layer is selectively removed from an upper surface of the semiconductor substrate.

摘要翻译： 通过硅通孔（TSV）形成的方法包括在半导体衬底中形成初级通孔，在初级通孔中沉积低k介电材料，通过蚀刻主通孔中的低k电介质形成次级通孔 以同时形成低k电介质层的通孔绝缘层和金属间介电层的方式。 通孔绝缘层由侧壁上的低k电介质材料和限定初级通孔的衬底的底表面形成，并且金属介电层形成在衬底的上表面上。 然后在包括在二次通孔中的基板上形成金属层，并且从半导体基板的上表面选择性地去除金属层。

公开(公告)号：US08426308B2

公开(公告)日：2013-04-23

申请号：US13235717

申请日：2011-09-19

申请人： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Beak ,  Kyoung-hee Kim ,  Byung-Iyul Park ,  Byung-hee Kim

发明人： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Beak ,  Kyoung-hee Kim ,  Byung-Iyul Park ,  Byung-hee Kim

IPC分类号： H01L21/28 ,  H01L21/44 ,  H01L23/528

CPC分类号： H01L23/481 ,  H01L21/76801 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76898 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A method of forming through silicon vias (TSVs) includes forming a primary via hole in a semiconductor substrate, depositing low-k dielectric material in the primary via hole, forming a secondary via hole by etching the low-k dielectric in the primary via hole, in such a manner that a via insulating layer and an inter metal dielectric layer of the low-k dielectric layer are simultaneously formed. The via insulating layer is formed of the low-k dielectric material on sidewalls and a bottom surface of the substrate which delimit the primary via hole and the inter metal dielectric layer is formed on an upper surface of the substrate. Then a metal layer is formed on the substrate including in the secondary via hole, and the metal layer is selectively removed from an upper surface of the semiconductor substrate.

摘要翻译： 通过硅通孔（TSV）形成的方法包括在半导体衬底中形成初级通孔，在初级通孔中沉积低k介电材料，通过蚀刻主通孔中的低k电介质形成次级通孔 以同时形成低k电介质层的通孔绝缘层和金属间介电层的方式。 通孔绝缘层由侧壁上的低k电介质材料和限定初级通孔的衬底的底表面形成，并且金属介电层形成在衬底的上表面上。 然后在包括在二次通孔中的基板上形成金属层，并且从半导体基板的上表面选择性地去除金属层。

公开(公告)号：US07303141B2

公开(公告)日：2007-12-04

申请号：US10801852

申请日：2004-03-17

申请人： Kyu-hee Han ,  Sang-wook Yoo ,  Suk-chan Lee

发明人： Kyu-hee Han ,  Sang-wook Yoo ,  Suk-chan Lee

IPC分类号： B05B17/00

CPC分类号： C23C16/4558

摘要： A gas supplying apparatus for supplying deposition gas onto a substrate surface, the gas supplying apparatus comprising: a gas supplying ring with one or more gas supplying channels formed along the interior of the gas supplying ring and with a plurality of gas distribution channels directed toward a center of the gas supplying ring; and a plurality of adapters with gas nozzles connecting to the gas distribution channels, respectively, that detachably connect to the interior of the gas supplying ring, wherein the gas nozzles have a variety of injection configurations.

摘要翻译： 一种用于将沉积气体供应到基板表面上的气体供应装置，所述气体供应装置包括：气体供给环，其具有沿着所述气体供应环的内部形成的一个或多个气体供应通道，以及多个朝向 供气环中心; 以及分别具有连接到气体分配通道的气体喷嘴的多个适配器，其可拆卸地连接到气体供应环的内部，其中气体喷嘴具有各种喷射构型。

公开(公告)号：US20050155555A1

公开(公告)日：2005-07-21

申请号：US11020006

申请日：2004-12-23

申请人： Kyu-hee Han ,  Ju-hyun Lee ,  Hee-jeon Yang ,  Ki-hyun Kim

发明人： Kyu-hee Han ,  Ju-hyun Lee ,  Hee-jeon Yang ,  Ki-hyun Kim

IPC分类号： H05H1/46 ,  C23C16/00 ,  C23C16/44 ,  H01J37/32 ,  H01L21/205

CPC分类号： H01J37/32522 ,  H01J37/321 ,  H01J37/32935

摘要： A semiconductor manufacturing apparatus includes a chamber main body and a dome to form an accommodating space to accommodate a substrate, an antenna provided on the dome to generate a plasma in the accommodating space, and a temperature controller provided on the dome to control a temperature of the dome. The temperature controller includes a heat transfer unit provided on the dome or in the vicinity of the dome and the antenna, a heater provided on the heat transfer unit to heat the dome, a cooler provided between the heat transfer unit and the heater to cool the dome, and an adjusting valve connected to the cooler to adjust the quantity of coolant supplied to the cooler to control the temperature of the dome within a predetermined reference temperature range. The temperature of the dome may be maintained constant within the predetermined reference temperature range if an electrical power with a high voltage is supplied to the antennato generate the plasma with a high density in the chamber.

摘要翻译： 半导体制造装置包括室主体和圆顶，以形成容纳基板的容纳空间，设置在圆顶上的天线，以在容纳空间中产生等离子体;以及温度控制器，设置在穹顶上以控制温度 圆顶。 温度控制器包括设置在穹顶或穹顶和天线附近的传热单元，设置在传热单元上以加热穹顶的加热器，设置在传热单元和加热器之间的冷却器，以冷却 圆顶和连接到冷却器的调节阀，以调节供应到冷却器的冷却剂的量，以在预定的参考温度范围内控制圆顶的温度。 如果将具有高电压的电力供应给天线，则腔室中的高密度产生等离子体，则可以在预定的参考温度范围内将圆顶的温度保持恒定。