摘要:
A CMOS transistor is provided having a relatively high breakdown voltage. The CMOS transistor includes an N-type epitaxial layer on a P-type substrate. Between the substrate and epitaxial layer are a heavily doped N-type buried layer and a heavily doped P-type base layer. An N-type sink region is proximate the edge of the NMOS region, and twin wells are in the area surrounded with the sink region. N+ source and drain regions are formed in respective wells. As the sink region is interposed between the drain and isolation regions, a breakdown occurs between the sink and isolation regions when a high voltage is applied. Twin wells are also formed in the PMOS region. P+ source and drain regions are formed in respective wells. As the N-type well surrounds the source and bulk regions, a breakdown occurs between a buried region and the isolation region when a high voltage is applied.
摘要:
A CMOS transistor is provided having a relatively high breakdown voltage. The CMOS transistor includes an N-type epitaxial layer on a P-type substrate. Between the substrate and epitaxial layer are a heavily doped N-type buried layer and a heavily doped P-type base layer. An N-type sink region is proximatethe edge of the NMOS region, and twin wells are in the area surrounded with the sink region. N+ source and drain regions are formed in respective wells. As the sink region is interposed between the drain and isolation regions, a breakdown occurs between the sink and isolation regions when a high voltage is applied. Twin wells are also formed in the PMOS region P+ source and drain regions are formed in respective wells. As the N-type well surrounds the source and bulk regions, a breakdown occurs between a buried region and the isolation region when a high voltage is applied.
摘要:
Improved G-rich oligonucleotide (GRO) aptamers specific to nucleolin, a method of preparing the aptamers, and a use of the aptamers for diagnosing and/or treating a nucleolin-associated disease, are provided.
摘要:
A method for preparing amino linker oligonucleotides is provided. More specifically, a method of preparing 5′-amino-linker oligonucleotides comprising the steps of: introducing an amino linker having a protecting group into the 5′ terminus of an oligonucleotide; and removing the protecting group from the amino linker oligonucleotide by contacting with acetic acid and 2,2,2-trifluoroethanol is provided. The amino protecting group is efficiently removed from the amino linker oligonucleotides, and thereby achieving a high yield of the amino linker oligonucleotides.
摘要:
A semiconductor device comprises a recessed trench in a substrate, a gate insulating layer including a first portion and a second portion, the first portion having a first thickness and covering lower portions of sidewalls of the recessed trench and a bottom surface of the recessed trench, and the second portion having a second thickness and covering upper portions of the sidewalls of the recessed trench, the second thickness being greater than the first thickness, a gate electrode filling the recessed trench, a first impurity region having a first concentration and disposed at opposing sides of the gate electrode, and a second impurity region having a second concentration greater than the first concentration and disposed on the first impurity region to correspond to the second portion of the gate insulating layer.
摘要:
In a high frequency LDMOS transistor, a gate structure is formed on a substrate. A drain, doped with first type impurities at a first concentration, is formed on the substrate spaced apart from the gate structure. A buffer well, doped with the first type impurities at a second concentration lower than the first concentration, surrounds side and lower portions of the drain. A lightly doped drain, doped with the first type impurities at a third concentration lower than the second concentration, is formed between the buffer well and the gate structure. A source, doped with the first type impurities at the first concentration, is formed on the substrate adjacent to the gate structure and opposite to the drain with respect to the gate structure. Accordingly, an on-resistance decreases while a breakdown voltage increases in the LDMOS transistor without increasing a capacitance between the gate structure and the drain.
摘要:
A semiconductor device, and a method of manufacturing the same, containing a high voltage DMOS transistor, a low voltage CMOS transistor, and a bipolar transistor in a single substrate. The steps include forming an isolation layer within the substrate in an isolation region between each of a DMOS region, a CMOS region, or a bipolar region. A first oxide layer of variable thickness is formed on the substrate, a thick second oxide layer is formed on the isolation layer, and a polysilicon layer is formed on both oxide layers. The polysilicon layer is patterned to form gate patterns on the first oxide layer and resistive patterns on the second oxide layer. The gate pattern is then doped but the resistive pattern is undoped. The thickness of the first oxide layer in the DMOS region is greater than the thickness of the first oxide layer in the CMOS region.
摘要:
In a high frequency LDMOS transistor, a gate structure is formed on a substrate. A drain, doped with first type impurities at a first concentration, is formed on the substrate spaced apart from the gate structure. A buffer well, doped with the first type impurities at a second concentration lower than the first concentration, surrounds side and lower portions of the drain. A lightly doped drain, doped with the first type impurities at a third concentration lower than the second concentration, is formed between the buffer well and the gate structure. A source, doped with the first type impurities at the first concentration, is formed on the substrate adjacent to the gate structure and opposite to the drain with respect to the gate structure. Accordingly, an on-resistance decreases while a breakdown voltage increases in the LDMOS transistor without increasing a capacitance between the gate structure and the drain.
摘要:
There are provided a double-diffused MOS (Metal Oxide Semiconductor) transistor and a fabricating method thereof. In the double-diffused MOS transistor, a buried layer of a first conductive type and an epitaxial layer of the first conductive type are sequentially formed on a semiconductor substrate, and a gate electrode is formed on the epitaxial layer of the first conductive type with interposition of a gate insulating film. Source and drain regions of the first conductive type are formed in the surface of the epitaxial layer of the first conductive type in self-alignment and non-self-alignment with the gate electrode, respectively. A body region of a second conductive type is formed in the surface of the epitaxial layer of the first conductive type to be surrounded by the source region of the first conductive type, and a bulk bias region of the second conductive type is formed in the body region of the second conductive type under the source region of the first conductive type.
摘要:
A semiconductor device comprises a recessed trench in a substrate, a gate insulating layer including a first portion and a second portion, the first portion having a first thickness and covering lower portions of sidewalls of the recessed trench and a bottom surface of the recessed trench, and the second portion having a second thickness and covering upper portions of the sidewalls of the recessed trench, the second thickness being greater than the first thickness, a gate electrode filling the recessed trench, a first impurity region having a first concentration and disposed at opposing sides of the gate electrode, and a second impurity region having a second concentration greater than the first concentration and disposed on the first impurity region to correspond to the second portion of the gate insulating layer.