公开(公告)号：US20060048382A1

公开(公告)日：2006-03-09

申请号：US11218995

申请日：2005-09-01

申请人： Larry Kinsman ,  Mike Brooks ,  Warren Farnworth ,  Walter Moden ,  Terry Lee

发明人： Larry Kinsman ,  Mike Brooks ,  Warren Farnworth ,  Walter Moden ,  Terry Lee

IPC分类号： H01R43/20

CPC分类号： H05K7/1415 ,  B25B27/00 ,  H05K3/301 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49153 ,  Y10T29/49169 ,  Y10T29/49208 ,  Y10T29/49222 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53183 ,  Y10T29/53191 ,  Y10T29/53209 ,  Y10T29/53257 ,  Y10T29/53261 ,  Y10T29/53265

摘要： A technique is provided for installing circuit components, such as memory devices, in a support, such as a socket. The device to be installed is supported in a holder or shell. The holder is positioned over a support region in the receiving socket. A manual actuator is pressed into the holder to eject the device from the holder and to install the device in the support. The holder may be configured to hold a single device, or multiple devices aligned in slots defined by partitions. A multi-device tray may be provided for indexing devices toward an ejection slot, through which the devices are installed by manual actuation of an ejecting actuator. The technique provides protection for the device prior to and during installation, and facilitates manual installation of such devices without requiring direct hand contact with the device either prior to or during installation.

摘要翻译： 提供了一种技术，用于将诸如存储设备的电路组件安装在诸如插座的支撑件中。 要安装的设备支撑在支架或外壳中。 保持器定位在接收插座中的支撑区域上方。 将手动执行器压入保持器中以将装置从保持器中排出并将装置安装在支撑件中。 保持器可以被配置为保持单个设备，或者多个设备在由分区定义的槽中对齐。 可以提供多装置托盘用于将装置向分度装置移动到排出槽，通过这些装置通过手动驱动排放致动器来安装装置。 该技术在安装之前和安装期间为设备提供保护，并且便于手动安装这些设备，而不需要在安装之前或安装期间直接与设备接触。

公开(公告)号：US20060033190A1

公开(公告)日：2006-02-16

申请号：US11257428

申请日：2005-10-24

申请人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

发明人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

IPC分类号： H01L23/02

CPC分类号： H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

摘要： A semiconductor device package includes a die, a package encapsulating at least a portion of the die, and a plurality of leads. Each lead of the plurality includes an external portion. The external portion of each lead is substantially planar and extends outward from a bottom edge of the package. The external portion of each lead may be oriented in a plane that is substantially parallel to a plane within which the die is located. A semiconductor device including these features may be part of an assembly that also includes an alignment device for orienting the semiconductor device package in nonparallel relation to a substrate.

摘要翻译： 半导体器件封装包括管芯，封装至少一部分裸片的封装以及多个引线。 多个的每个引线包括外部部分。 每个引线的外部部分基本上是平面的并且从封装的底部边缘向外延伸。 每个引线的外部部分可以在基本上平行于管芯所在的平面的平面内取向。 包括这些特征的半导体器件可以是组件的一部分，该组件还包括用于将半导体器件封装以非平行关系定向到衬底的对准装置。

公开(公告)号：US20060001150A1

公开(公告)日：2006-01-05

申请号：US11219134

申请日：2005-09-01

申请人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

发明人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

IPC分类号： H01L23/48

CPC分类号： H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

摘要： A semiconductor device including a plurality of stub contacts extending from a single edge thereof. A complementary alignment device includes at least one receptacle for receiving the semiconductor device. The alignment device is securable to a carrier substrate. A contact element may be configured to bias the semiconductor device in such a way as to establish and maintain electrical communication between the semiconductor device and the carrier substrate.

摘要翻译： 一种半导体器件，包括从其单个边缘延伸的多个短截线触点。 互补对准装置包括用于接收半导体器件的至少一个插座。 对准装置可固定到载体基板。 接触元件可以被配置为以这样的方式偏置半导体器件，以便建立和维持半导体器件和载体衬底之间的电连通。

公开(公告)号：US06903465B2

公开(公告)日：2005-06-07

申请号：US09949683

申请日：2001-09-10

申请人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

发明人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

IPC分类号： H01L23/31 ,  H01L23/528 ,  H01L25/065 ,  H01L23/28

CPC分类号： H01L23/528 ,  H01L23/3171 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end. The present invention contemplates wire bonding and encapsulation of individual die as well as multiple die on a single wafer.

摘要翻译： 一种用于封装半导体器件的方法包括将多个引线引线连接到半导体器件上的对应的多个电连接焊盘，覆盖半导体器件的至少一部分以及每个引线的至少一部分具有封装 并且去除所述封装材料的一部分和所述导线引线中的每一个的一部分以形成封装的半导体器件，其中所述引线中的每一个仅在一端具有暴露部分。 本发明还包括具有集成电路器件的封装半导体器件，该集成电路器件具有多个电连接焊盘，耦合到多个电连接焊盘的多个引线引线以及覆盖该集成电路的至少一部分的封装材料的覆盖物 装置并且覆盖每个导线，其中每个导线具有暴露端。 本发明设想在单个晶片上引线接合和封装单个管芯以及多个管芯。

公开(公告)号：US20060030072A1

公开(公告)日：2006-02-09

申请号：US11219214

申请日：2005-09-01

申请人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

发明人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

IPC分类号： H01L21/50

CPC分类号： H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

摘要： A method for securing a semiconductor device to a carrier substrate includes inserting a semiconductor device with a plurality of stub contacts extending from a bottom edge thereof into a receptacle of an alignment device associated with the carrier substrate. Upon attachment of the alignment device to a carrier substrate and insertion of a vertically mountable semiconductor device into the receptacle, the semiconductor device is biased so as to establish and maintain electrical communication between the semiconductor device and the carrier substrate.

公开(公告)号：US20060001155A1

公开(公告)日：2006-01-05

申请号：US11219135

申请日：2005-09-01

申请人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

发明人： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

IPC分类号： H01L23/04

CPC分类号： H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

摘要： A semiconductor device package including leads with substantially planar exposed portions extending from a bottom edge of the package. The exposed portions of the leads may comprise stub contacts extending perpendicularly from the bottom edge. The exposed portions of the leads may be substantially rigid or nondeformable. A complementary alignment device that may be used with the semiconductor device package may include a receptacle for receiving the semiconductor device package.

摘要翻译： 一种半导体器件封装，包括具有从封装的底部边缘延伸的基本平坦的暴露部分的引线。 引线的露出部分可以包括从底部边缘垂直延伸的短截线。 引线的暴露部分可以是基本上刚性的或不可变形的。 可以与半导体器件封装一起使用的互补对准装置可以包括用于接收半导体器件封装的插座。

公开(公告)号：US06777261B2

公开(公告)日：2004-08-17

申请号：US10304911

申请日：2002-11-26

申请人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

发明人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

IPC分类号： H01L2144

CPC分类号： H01L25/0657 ,  H01L23/3171 ,  H01L23/528 ,  H01L2224/05553 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/30107 ,  H01L2924/00

摘要： A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end. The present invention contemplates wire bonding and encapsulation of individual die as well as multiple die on a single wafer.

摘要翻译： 一种用于封装半导体器件的方法包括将多个引线引线连接到半导体器件上的对应的多个电连接焊盘，覆盖半导体器件的至少一部分以及每个引线的至少一部分具有封装 并且去除所述封装材料的一部分和所述导线引线中的每一个的一部分以形成封装的半导体器件，其中所述引线中的每一个仅在一端具有暴露部分。 本发明还包括具有集成电路器件的封装半导体器件，该集成电路器件具有多个电连接焊盘，耦合到多个电连接焊盘的多个引线引线以及覆盖该集成电路的至少一部分的封装材料的覆盖物 装置并且覆盖每个导线，其中每个导线具有暴露端。 本发明设想在单个晶片上引线接合和封装单个管芯以及多个管芯。

公开(公告)号：US06511863B2

公开(公告)日：2003-01-28

申请号：US09749110

申请日：2000-12-26

申请人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

发明人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

IPC分类号： H01L2144

CPC分类号： H01L23/528 ,  H01L23/3171 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end. The present invention contemplates wire bonding and encapsulation of individual die as well as multiple die on a single wafer.

公开(公告)号：US06291894B1

公开(公告)日：2001-09-18

申请号：US09143765

申请日：1998-08-31

申请人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

发明人： Warren Farnworth ,  Larry Kinsman ,  Walter Moden

IPC分类号： H01L2348

CPC分类号： H01L23/528 ,  H01L23/3171 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end. The present invention contemplates wire bonding and encapsulation of individual die as well as multiple die on a single wafer.

摘要翻译： 一种用于封装半导体器件的方法包括将多个引线引线连接到半导体器件上的对应的多个电连接焊盘，覆盖半导体器件的至少一部分以及每个引线的至少一部分具有封装 并且去除所述封装材料的一部分和所述导线引线中的每一个的一部分以形成封装的半导体器件，其中所述引线中的每一个仅在一端具有暴露部分。 本发明还包括具有集成电路器件的封装半导体器件，该集成电路器件具有多个电连接焊盘，耦合到多个电连接焊盘的多个引线引线以及覆盖该集成电路的至少一部分的封装材料的覆盖物 装置并且覆盖每个导线，其中每个导线具有暴露端。 本发明设想在单个晶片上引线接合和封装单个管芯以及多个管芯。

公开(公告)号：US20050156297A1

公开(公告)日：2005-07-21

申请号：US11040555

申请日：2005-01-21

申请人： Warren Farnworth ,  Alan Wood ,  Mike Brooks

发明人： Warren Farnworth ,  Alan Wood ,  Mike Brooks

IPC分类号： H01L23/498 ,  H01L21/44 ,  H01L23/02 ,  H01L23/495 ,  H01L29/40

CPC分类号： H01L23/49827 ,  H01L23/4985 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02333 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48465 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： A chip scale semiconductor package and a method for fabricating the package are provided. The package includes a semiconductor die and a flex circuit bonded to the face of the die. The flex circuit includes a polymer substrate with a dense array of external contacts, and a pattern of conductors in electrical communication with the external contacts. The package also includes interconnects configured to provide separate electrical paths between die contacts (e.g., bond pads), and the conductors on the flex circuit. Several different embodiments of interconnects are provided including: bumps on the die contacts, bonded to the flex circuit conductors with a conductive adhesive layer; polymer bumps on the conductors, or die contacts, applied in a semi-cured state and then fully cured; solder bumps on the die contacts and conductors, bonded to one another using a bonding tool; rivet-like bonded connections between the conductors and die contacts, formed using metal bumps and a wire bonding or ball bonding apparatus; single point bonded connections between the conductors and die contacts, formed with a bonding tool; and wire bonds between the conductors and die contacts.

摘要翻译： 提供了一种芯片级半导体封装和一种制造该封装的方法。 该封装包括半导体管芯和连接到管芯的表面的柔性电路。 柔性电路包括具有密集阵列的外部触点的聚合物基板和与外部触点电连通的导体图案。 封装还包括被配置为在管芯触头（例如，焊盘）之间提供分开的电路径的互连件以及柔性电路上的导体。 提供了互连的几个不同实施例，包括：在裸片上的凸起接触，用导电粘合剂层结合到柔性电路导体上; 导体上的聚合物凸块或模具接触件以半固化状态施加，然后完全固化; 使用焊接工具彼此接合的管芯触点和导体上的焊料凸块; 使用金属凸块和引线接合或球焊接装置形成的导体和裸片接触之间的铆钉状接合连接; 导体和裸片接点之间的单点接合连接，用接合工具形成; 以及导体和裸片接触之间的引线键合。