Low energy passivation of conductive material in damascene process for semiconductors
    1.
    发明授权
    Low energy passivation of conductive material in damascene process for semiconductors 有权
    半导体镶嵌工艺中导电材料的低能钝化

    公开(公告)号:US06171949B2

    公开(公告)日:2001-01-09

    申请号:US09329155

    申请日:1999-06-09

    IPC分类号: H01L214763

    摘要: A method for manufacturing an integrated circuit using damascene processes is provided in which conductive material surfaces subject to chemical-mechanical polishing are passivated after polishing with a dry, low energy, ion implantation passivating process to prevent oxidation and to eliminate a high dielectric constant protective layer. In particular, copper conductive material is subject to nitrogen implantation at or below 100 KeV to produce a protective copper nitride.

    摘要翻译: 提供一种使用镶嵌工艺制造集成电路的方法,其中进行化学机械抛光的导电材料表面在用干燥,低能量的离子注入钝化工艺抛光后被钝化,以防止氧化并消除高介电常数保护层 。 特别地,铜导电材料在100KeV以下进行氮注入以产生保护性的氮化铜。

    Method for forming low dielectric passivation of copper interconnects
    2.
    发明授权
    Method for forming low dielectric passivation of copper interconnects 有权
    形成铜互连的低介电钝化的方法

    公开(公告)号:US6147000A

    公开(公告)日:2000-11-14

    申请号:US225546

    申请日:1999-01-05

    摘要: A Cu interconnect member is passivated by diffusing Sn, Ta or Cr atoms into its upper surface to form an intermetallic layer. Embodiments include depositing Cu by electroplating or electroless plating to fill a damascene opening in a dielectric layer, CMP, depositing a sacrificial layer of Sn, Ta or Cr on the planarized surface, heating to diffuse Sn, Ta or Cr into the upper surface of the deposited Cu to form a passivating intermetallic alloy layer, and removing any remaining sacrificial layer by CMP or etching.

    摘要翻译: 通过将Sn,Ta或Cr原子扩散到其上表面来形成金属间化合物来钝化Cu互连构件。 实施例包括通过电镀或化学电镀沉积Cu以填充电介质层中的镶嵌开口,CMP,在平坦化表面上沉积Sn,Ta或Cr的牺牲层,加热以将Sn,Ta或Cr扩散到 沉积Cu以形成钝化金属间合金层,并通过CMP或蚀刻去除任何残留的牺牲层。

    Conformal liner for gap-filling
    5.
    发明申请
    Conformal liner for gap-filling 审中-公开
    用于间隙填充的保形衬套

    公开(公告)号:US20080096364A1

    公开(公告)日:2008-04-24

    申请号:US11582442

    申请日:2006-10-18

    IPC分类号: H01L21/76

    摘要: Gap filling between features which are closely spaced is significantly improved by initially depositing a thin conformal layer followed by depositing a layer of gap filling dielectric material. Embodiments include depositing a thin conformal layer of silicon nitride or silicon oxide, as by atomic layer deposition or pulsed layer deposition, into the gap between adjacent gate electrode structures such that it flows into undercut regions of dielectric spacers on side surfaces of the gate electrode structures, and then depositing a layer of BPSG or P-HDP oxide on the thin conformal layer into the gap. Embodiments further include depositing the layers at a temperature less than 430° C., as by depositing a P-HDP oxide after depositing the conformal liner when the gate electrode structures include a layer of nickel silicide.

    摘要翻译: 通过初始沉积薄的共形层,然后沉积一层间隙填充电介质材料,密切间隔的特征之间的间隙填充显着改善。 实施例包括通过原子层沉积或脉冲层沉积将氮化硅或氧化硅的薄保形层沉积到相邻栅电极结构之间的间隙中,使得其流到栅电极结构的侧表面上的电介质间隔物的底切区域 ,然后在薄的共形层上沉积一层BPSG或P-HDP氧化物到间隙中。 实施例还包括在低于430℃的温度下沉积层,如通过在栅极电极结构包括硅化镍层沉积保形衬垫之后沉积P-HDP氧化物。

    Memory device having a nanocrystal charge storage region and method
    6.
    发明授权
    Memory device having a nanocrystal charge storage region and method 有权
    具有纳米晶体电荷存储区域和方法的存储器件

    公开(公告)号:US07309650B1

    公开(公告)日:2007-12-18

    申请号:US11065388

    申请日:2005-02-24

    IPC分类号: H01L21/44

    摘要: A memory device having a metal nanocrystal charge storage structure and a method for its manufacture. The memory device may be manufactured by forming a first oxide layer on the semiconductor substrate, then disposing a porous dielectric layer on the oxide layer and disposing a second oxide layer on the porous dielectric layer. A layer of electrically conductive material is formed on the second layer of dielectric material. An etch mask is formed on the electrically conductive material. The electrically conductive material and the underlying dielectric layers are anisotropically etched to form a dielectric structure on which a gate electrode is disposed. A metal layer is formed on the dielectric structure and the gate electrode and treated so that portions of the metal layer diffuse into the porous dielectric layer. Then the metal layer is removed.

    摘要翻译: 一种具有金属纳米晶体电荷存储结构的存储器件及其制造方法。 存储器件可以通过在半导体衬底上形成第一氧化物层,然后在氧化物层上设置多孔介电层并在第二氧化物层上设置第二氧化物层来制造。 在第二介电材料层上形成一层导电材料。 在导电材料上形成蚀刻掩模。 导电材料和下面的介电层被各向异性地蚀刻以形成其上设置有栅电极的电介质结构。 在介电结构和栅电极上形成金属层,并处理金属层的一部分扩散到多孔介电层中。 然后去除金属层。

    Polymer spacers for creating small geometry space and method of manufacture thereof
    8.
    发明授权
    Polymer spacers for creating small geometry space and method of manufacture thereof 有权
    用于产生小几何空间的聚合物间隔物及其制造方法

    公开(公告)号:US06699792B1

    公开(公告)日:2004-03-02

    申请号:US09907398

    申请日:2001-07-17

    IPC分类号: H01L21311

    摘要: In forming an opening or space in a substrate, a layer of photoresist is provided on the substrate, and the photoresist is patterned to provide photoresist bodies having respective adjacent sidewalls. A polymer layer is provided on the resulting structure through a low temperature conformal CVD process. The polymer layer is anisotropically etched to form spacers on the respective adjacent sidewalls of the photoresist bodies. The substrate is then etched using the spacers as a mask.

    摘要翻译: 在形成衬底中的开口或空间时,在衬底上提供光致抗蚀剂层,并且对光致抗蚀剂进行图案化以提供具有相应相邻侧壁的光致抗蚀剂体。 通过低温保形CVD工艺在所得结构上提供聚合物层。 聚合物层被各向异性蚀刻以在光致抗蚀剂体的各个相邻侧壁上形成间隔物。 然后使用间隔物作为掩模蚀刻衬底。

    Method of forming a metal or metal nitride interface layer between silicon nitride and copper
    10.
    发明授权
    Method of forming a metal or metal nitride interface layer between silicon nitride and copper 有权
    在氮化硅和铜之间形成金属或金属氮化物界面层的方法

    公开(公告)号:US06518167B1

    公开(公告)日:2003-02-11

    申请号:US10123588

    申请日:2002-04-16

    IPC分类号: H01L214763

    摘要: A method of forming a metal or metal nitride layer interface between a copper layer and a silicon nitride layer can include providing a metal organic gas or metal/metal nitride precursor over a copper layer, forming a metal or metal nitride layer from reactions between the metal organic gas or metal/metal nitride precursor and the copper layer, and depositing a silicon nitride layer over the metal or metal nitride layer and copper layer. The metal or metal nitride layer can provide a better interface adhesion between the silicon nitride layer and the copper layer. The metal layer can improve the interface between the copper layer and the silicon nitride layer, improving electromigration reliability and, thus, integrated circuit device performance.

    摘要翻译: 在铜层和氮化硅层之间形成金属或金属氮化物层界面的方法可以包括在铜层上提供金属有机气体或金属/金属氮化物前体,从金属或金属氮化物层之间的反应形成金属或金属氮化物层 有机气体或金属/金属氮化物前体和铜层,以及在金属或金属氮化物层和铜层上沉积氮化硅层。 金属或金属氮化物层可以在氮化硅层和铜层之间提供更好的界面粘合性。 金属层可以改善铜层和氮化硅层之间的界面,提高电迁移可靠性,从而提高集成电路器件的性能。