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    Memory device having a nanocrystal charge storage region and method
    1.
    发明授权
    Memory device having a nanocrystal charge storage region and method 有权
    具有纳米晶体电荷存储区域和方法的存储器件

    公开(公告)号：US07309650B1

    公开(公告)日：2007-12-18

    申请号：US11065388

    申请日：2005-02-24

    申请人： Connie Pin-Chin Wang ,  Lu You ,  Zoran Krivokapic ,  Paul Raymond Besser ,  Suzette Keefe Pangrle

    发明人： Connie Pin-Chin Wang ,  Lu You ,  Zoran Krivokapic ,  Paul Raymond Besser ,  Suzette Keefe Pangrle

    IPC分类号： H01L21/44

    CPC分类号： H01L29/7833 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332

    摘要： A memory device having a metal nanocrystal charge storage structure and a method for its manufacture. The memory device may be manufactured by forming a first oxide layer on the semiconductor substrate, then disposing a porous dielectric layer on the oxide layer and disposing a second oxide layer on the porous dielectric layer. A layer of electrically conductive material is formed on the second layer of dielectric material. An etch mask is formed on the electrically conductive material. The electrically conductive material and the underlying dielectric layers are anisotropically etched to form a dielectric structure on which a gate electrode is disposed. A metal layer is formed on the dielectric structure and the gate electrode and treated so that portions of the metal layer diffuse into the porous dielectric layer. Then the metal layer is removed.

    摘要翻译： 一种具有金属纳米晶体电荷存储结构的存储器件及其制造方法。 存储器件可以通过在半导体衬底上形成第一氧化物层，然后在氧化物层上设置多孔介电层并在第二氧化物层上设置第二氧化物层来制造。 在第二介电材料层上形成一层导电材料。 在导电材料上形成蚀刻掩模。 导电材料和下面的介电层被各向异性地蚀刻以形成其上设置有栅电极的电介质结构。 在介电结构和栅电极上形成金属层，并处理金属层的一部分扩散到多孔介电层中。 然后去除金属层。

    Method for manufacturing a memory device having a nanocrystal charge storage region
    2.
    发明授权
    Method for manufacturing a memory device having a nanocrystal charge storage region 有权
    一种具有纳米晶体电荷存储区域的存储器件的制造方法

    公开(公告)号：US07378310B1

    公开(公告)日：2008-05-27

    申请号：US11116551

    申请日：2005-04-27

    申请人： Connie Pin-Chin Wang ,  Zoran Krivokapic ,  Suzette Keefe Pangrle ,  Robert Chiu ,  Lu You

    发明人： Connie Pin-Chin Wang ,  Zoran Krivokapic ,  Suzette Keefe Pangrle ,  Robert Chiu ,  Lu You

    IPC分类号： H01L21/8242

    CPC分类号： H01L21/28273 ,  B82Y10/00 ,  H01L29/42332 ,  H01L29/7881

    摘要： A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. A layer of metal oxide having a first heat of formation is formed on the first layer of dielectric material. A metal layer having a second heat of formation is formed on the metal oxide layer. The second heat of formation is greater than the first heat of formation. The metal oxide layer and the metal layer are annealed which causes the metal layer to reduce the metal oxide layer to metallic form, which then agglomerates to form metal islands. The metal layer becomes oxidized thereby embedding the metal islands within an oxide layer to form a nanocrystal layer. A control oxide is formed over the nanocrystal layer and a gate electrode is formed on the control oxide.

    摘要翻译： 一种具有金属纳米晶电荷存储结构的存储器件的制造方法。 提供衬底并且在衬底上生长第一介电材料层。 在第一绝缘材料层上形成具有第一形成热的金属氧化物层。 在金属氧化物层上形成具有第二次形成热的金属层。 第二次形成的热量大于第一次形成的热量。 金属氧化物层和金属层被退火，这导致金属层将金属氧化物层还原成金属形式，然后使其聚集形成金属岛。 金属层变得氧化，从而将金属岛嵌入氧化物层中以形成纳米晶层。 在纳米晶体层上形成控制氧化物，在控制氧化物上形成栅电极。

    Conformal liner for gap-filling
    5.
    发明申请
    Conformal liner for gap-filling 审中-公开
    用于间隙填充的保形衬套

    公开(公告)号：US20080096364A1

    公开(公告)日：2008-04-24

    申请号：US11582442

    申请日：2006-10-18

    申请人： Erik Wilson ,  Minh-Van Ngo ,  Hieu Pham ,  Robert Huertas ,  Lu You ,  Hirokazu Tokuno ,  Alexander Nickel ,  Minh Tran

    发明人： Erik Wilson ,  Minh-Van Ngo ,  Hieu Pham ,  Robert Huertas ,  Lu You ,  Hirokazu Tokuno ,  Alexander Nickel ,  Minh Tran

    IPC分类号： H01L21/76

    CPC分类号： H01L21/823468 ,  H01L21/76829 ,  H01L21/76837 ,  H01L21/823437

    摘要： Gap filling between features which are closely spaced is significantly improved by initially depositing a thin conformal layer followed by depositing a layer of gap filling dielectric material. Embodiments include depositing a thin conformal layer of silicon nitride or silicon oxide, as by atomic layer deposition or pulsed layer deposition, into the gap between adjacent gate electrode structures such that it flows into undercut regions of dielectric spacers on side surfaces of the gate electrode structures, and then depositing a layer of BPSG or P-HDP oxide on the thin conformal layer into the gap. Embodiments further include depositing the layers at a temperature less than 430° C., as by depositing a P-HDP oxide after depositing the conformal liner when the gate electrode structures include a layer of nickel silicide.

    摘要翻译： 通过初始沉积薄的共形层，然后沉积一层间隙填充电介质材料，密切间隔的特征之间的间隙填充显着改善。 实施例包括通过原子层沉积或脉冲层沉积将氮化硅或氧化硅的薄保形层沉积到相邻栅电极结构之间的间隙中，使得其流到栅电极结构的侧表面上的电介质间隔物的底切区域 ，然后在薄的共形层上沉积一层BPSG或P-HDP氧化物到间隙中。 实施例还包括在低于430℃的温度下沉积层，如通过在栅极电极结构包括硅化镍层沉积保形衬垫之后沉积P-HDP氧化物。

    Polymer spacers for creating small geometry space and method of manufacture thereof
    7.
    发明授权
    Polymer spacers for creating small geometry space and method of manufacture thereof 有权
    用于产生小几何空间的聚合物间隔物及其制造方法

    公开(公告)号：US06699792B1

    公开(公告)日：2004-03-02

    申请号：US09907398

    申请日：2001-07-17

    申请人： Fei Wang ,  Lu You ,  Lynne Okada

    发明人： Fei Wang ,  Lu You ,  Lynne Okada

    IPC分类号： H01L21311

    CPC分类号： H01L21/32139 ,  H01L21/0271 ,  H01L21/0338 ,  H01L21/31144

    摘要： In forming an opening or space in a substrate, a layer of photoresist is provided on the substrate, and the photoresist is patterned to provide photoresist bodies having respective adjacent sidewalls. A polymer layer is provided on the resulting structure through a low temperature conformal CVD process. The polymer layer is anisotropically etched to form spacers on the respective adjacent sidewalls of the photoresist bodies. The substrate is then etched using the spacers as a mask.

    摘要翻译： 在形成衬底中的开口或空间时，在衬底上提供光致抗蚀剂层，并且对光致抗蚀剂进行图案化以提供具有相应相邻侧壁的光致抗蚀剂体。 通过低温保形CVD工艺在所得结构上提供聚合物层。 聚合物层被各向异性蚀刻以在光致抗蚀剂体的各个相邻侧壁上形成间隔物。 然后使用间隔物作为掩模蚀刻衬底。

    Method of forming a metal or metal nitride interface layer between silicon nitride and copper
    9.
    发明授权
    Method of forming a metal or metal nitride interface layer between silicon nitride and copper 有权
    在氮化硅和铜之间形成金属或金属氮化物界面层的方法

    公开(公告)号：US06518167B1

    公开(公告)日：2003-02-11

    申请号：US10123588

    申请日：2002-04-16

    申请人： Lu You ,  Matthew S. Buynoski ,  Paul R. Besser ,  Jeremias D. Romero ,  Pin-Chin Connie Wang ,  Minh Q. Tran

    发明人： Lu You ,  Matthew S. Buynoski ,  Paul R. Besser ,  Jeremias D. Romero ,  Pin-Chin Connie Wang ,  Minh Q. Tran

    IPC分类号： H01L214763

    CPC分类号： H01L21/76849 ,  H01L21/28562 ,  H01L21/76834

    摘要： A method of forming a metal or metal nitride layer interface between a copper layer and a silicon nitride layer can include providing a metal organic gas or metal/metal nitride precursor over a copper layer, forming a metal or metal nitride layer from reactions between the metal organic gas or metal/metal nitride precursor and the copper layer, and depositing a silicon nitride layer over the metal or metal nitride layer and copper layer. The metal or metal nitride layer can provide a better interface adhesion between the silicon nitride layer and the copper layer. The metal layer can improve the interface between the copper layer and the silicon nitride layer, improving electromigration reliability and, thus, integrated circuit device performance.

    摘要翻译： 在铜层和氮化硅层之间形成金属或金属氮化物层界面的方法可以包括在铜层上提供金属有机气体或金属/金属氮化物前体，从金属或金属氮化物层之间的反应形成金属或金属氮化物层 有机气体或金属/金属氮化物前体和铜层，以及在金属或金属氮化物层和铜层上沉积氮化硅层。 金属或金属氮化物层可以在氮化硅层和铜层之间提供更好的界面粘合性。 金属层可以改善铜层和氮化硅层之间的界面，提高电迁移可靠性，从而提高集成电路器件的性能。