公开(公告)号：US3746950A

公开(公告)日：1973-07-17

申请号：US3746950D

申请日：1969-08-15

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： SAWAKI T ,  FUJIWARA S ,  HASEGAWA H ,  KANO G ,  IIZUKA M

IPC: H01L29/00 ,  H03F1/30 ,  H03F1/34 ,  H03F3/183 ,  H04R23/00 ,  H01L11/00 ,  H01L15/00

CPC classification number: H04R23/006 ,  H01L29/00 ,  H03F1/302 ,  H03F1/34 ,  H03F3/183

Abstract: A pressure-sensitive semi-conductor device with a Schottky barrier in which a separation space is formed underneath the insulating film covering a major surface portion of the semiconductor substrate and disposed adjacent a metal layer received in a recess in the substrate and extending through an opening in the insulating film, whereby the input pressure is applied to the metal layer. The separation space is formed by side-etching with the insulating film serving as mask.

Abstract translation: 一种具有肖特基势垒的压敏半导体器件，其中在覆盖半导体衬底的主表面部分的绝缘膜的下方形成分隔空间，并且设置在容纳在衬底的凹部中的金属层附近并延伸穿过 在绝缘膜上形成开口，由此将输入压力施加到金属层。 通过用作为掩模的绝缘膜进行侧面蚀刻来形成分离空​​间。

公开(公告)号：US3729807A

公开(公告)日：1973-05-01

申请号：US3729807D

申请日：1971-10-29

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FUJIWARA S

IPC: H01L21/00 ,  H01L21/607 ,  B23K31/02

CPC classification number: H01L21/00 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/29144 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/4823 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83444 ,  H01L2224/83805 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01039 ,  H01L2924/01045 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01063 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/15312 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/2011 ,  H01L2924/01052

Abstract: In making a semiconductor device comprising a die of silicon, germanium or gallium arsenide, the bonding of the die onto a metal header (i.e., holding member) is made firmly without insertion of a conventional thin gold film therebetween, by depositing gold onto the bonding face of a slice, which is to be cut into the die, in such a manner that at least the surface of the deposited layer is gold or an alloy of gold containing small amounts of an additive.

Abstract translation: 在制造包括硅，锗或砷化镓的裸片的半导体器件中，通过将金沉积到键合上，将裸片与金属接头（即，保持构件）的接合牢固地制成，而不会在其间插入常规的薄金膜 要切割成模具的切片的面，至少沉积层的表面是金或含有少量添加剂的金的合金。

公开(公告)号：US3763408A

公开(公告)日：1973-10-02

申请号：US3763408D

申请日：1969-08-15

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KANO G ,  IIZUKA M ,  SAWAKI T ,  FUJIWARA S ,  HASEGAWA H

IPC: H01L23/485 ,  H01L29/00 ,  H01L11/00 ,  H01L15/00

CPC classification number: H01L23/485 ,  H01L29/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semi-conductor device, such as diode transistor, field effect transistor with a Schottky barrier, has a separation space formed underneath the insulating film covering a major surface portion of the semiconductor substrate. This separation space is disposed adjacent to a metal layer accommodated in a recess in the substrate and extending through an opening in the insulating film, so as to eliminate unreasonable reverse leakage current, by effectively insulating the Schottky barrier from the electric charge accumulation layer beneath the insulating film.

Abstract translation: 诸如二极管晶体管的半导体器件，具有肖特基势垒的场效应晶体管具有形成在覆盖半导体衬底的主表面部分的绝缘膜下方的分离空间。 该分离空间与容纳在基板中的凹部中的金属层相邻设置并延伸穿过绝缘膜中的开口，以便通过有效地将肖特基势垒与电荷积累层有效地绝缘在消除不合理的反向泄漏电流 绝缘膜。

公开(公告)号：US3786320A

公开(公告)日：1974-01-15

申请号：US3786320D

申请日：1969-09-29

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KANO G ,  FUJIWARA S ,  SAWAKI T ,  IIZUKA M ,  HASEGAWA H

IPC: G01L1/18 ,  H01L21/00 ,  H01L29/00 ,  H01L29/84 ,  H01L11/00 ,  H01L15/00

CPC classification number: H01L29/84 ,  G01L1/18 ,  H01L21/00 ,  H01L29/00

Abstract: Disclosed is a pressure-sensitive transistor whose emitter or collector junction is formed by use of a Schottky barrier junction and wherein the current through the transistor changes in accordance with the applied pressure when pressure is applied to said junction by pressure applying means. Such a transistor is advantageous in that a high pressure-to-current conversion factor is obtained, little noise is generated at the junction, and the reverse leakage current appearing at the junction is extremely small.

Abstract translation: 公开了一种压敏晶体管，其发射极或集电极结通过使用肖特基势垒结形成，并且其中当压力通过压力施加装置施加到所述接合点时，通过晶体管的电流根据施加的压力而变化。 这样的晶体管的优点在于，获得高的压力 - 电流转换因子，在结处产生很少的噪声，并且在结处出现的反向泄漏电流非常小。

公开(公告)号：US3742315A

公开(公告)日：1973-06-26

申请号：US3742315D

申请日：1971-10-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KANO G ,  HASEGAWA H ,  IIZUKA M ,  FUJIWARA S ,  TERAMOTO I ,  IWASA H

IPC: H01L21/306 ,  H01L23/485 ,  H01L29/00 ,  H01L29/872 ,  H01L5/02 ,  H01L7/50 ,  H01L7/60

CPC classification number: H01L29/872 ,  H01L21/30608 ,  H01L23/4855 ,  H01L29/00 ,  H01L2924/0002 ,  Y10S148/051 ,  Y10S148/102 ,  Y10S148/115 ,  Y10S148/139 ,  H01L2924/00

Abstract: A semiconductor device having a Schottky barrier junction formed in the bottom of a polygonal recess on a surface of a semiconductor substrate comprises an undercut in the recess beneath an insulating mask formed on the substrate, and a metal passing through the mask and extending to the bottom of the recess for forming said junction. The undercut provides an enclosed spacing encircling the junction portion of said metal and said semiconductor, thereby improving the backward breakdown voltage characteristic therein.