公开(公告)号：US09184105B2

公开(公告)日：2015-11-10

申请号：US14334870

申请日：2014-07-18

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L23/02 ,  H01L23/22 ,  H01L21/00 ,  H01L23/34 ,  H01L23/367 ,  H01L23/31 ,  H01L25/065 ,  H01L23/433 ,  H01L25/18

CPC classification number: H01L23/367 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/34 ,  H01L23/433 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/00014

Abstract: Semiconductor devices may include a first semiconductor die comprising a heat-generating region located at a periphery thereof. A second semiconductor die is attached to the first semiconductor die. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die. Methods of forming semiconductor devices may involve attaching a second semiconductor die to a first semiconductor die. The first semiconductor die includes a heat-generating region at a periphery thereof. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die.

Abstract translation: 半导体器件可以包括第一半导体管芯，其包括位于其周边的发热区域。 第二半导体管芯附接到第一半导体管芯。 发热区域的至少一部分位于第二半导体管芯的覆盖区的横向外侧。 绝热材料位于第二半导体管芯的侧表面上。 形成半导体器件的方法可以包括将第二半导体管芯附接到第一半导体管芯。 第一半导体管芯包括在其周边的发热区域。 发热区域的至少一部分位于第二半导体管芯的覆盖区的横向外侧。 绝热材料位于第二半导体管芯的侧表面上。

公开(公告)号：US20180158751A1

公开(公告)日：2018-06-07

申请号：US15874406

申请日：2018-01-18

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L23/367 ,  H01L25/065 ,  H01L21/56 ,  H01L23/48 ,  H01L21/48

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/13 ,  H01L23/367 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/18161 ,  H01L2924/00

Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate.

公开(公告)号：US20170117205A1

公开(公告)日：2017-04-27

申请号：US15401762

申请日：2017-01-09

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/48 ,  H01L25/065 ,  H01L21/56

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/13 ,  H01L23/367 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/18161 ,  H01L2924/00

Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate. A heat sink may be located on a side of the uppermost semiconductor die opposite the substrate. A passivation material may be located between the uppermost semiconductor die and the heat sink.

公开(公告)号：US20160218085A1

公开(公告)日：2016-07-28

申请号：US14605466

申请日：2015-01-26

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L25/065 ,  H01L23/34 ,  H01L25/00 ,  H01L23/367 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/13 ,  H01L23/367 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/18161 ,  H01L2924/00

Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. The stack of semiconductor dice may include vias extending through each semiconductor die of the stack for electrically interconnecting the semiconductor dice in the stack to one another and to the substrate. Another semiconductor die may be electrically connected to the stack of semiconductor dice and may be located on a side of the stack of semiconductor dice opposing the substrate. The other semiconductor die may be a heat-generating component configured to generate more heat than each semiconductor die of the stack of semiconductor dice. Electrical connectors may be located laterally adjacent to the vias and may form electrical connections between the substrate and the other semiconductor die in isolation from integrated circuitry of the semiconductor dice in the stack.

Abstract translation: 根据本公开的半导体器件封装可以包括衬底和附接到衬底的半导体管芯堆叠。 半导体晶片的堆叠可以包括延伸穿过堆叠的每个半导体管芯的通孔，用于将堆叠中的半导体管芯彼此彼此和衬底电互连。 另一个半导体管芯可以电连接到半导体管芯的堆叠，并且可以位于与衬底相对的半导体管芯堆叠的一侧。 另一个半导体管芯可以是被配置成比半导体管芯堆叠的每个半导体管芯产生更多的热量的发热部件。 电连接器可以位于横向邻近通孔的位置，并且可以在堆叠中的半导体裸片的集成电路之外形成衬底和另一半导体管芯之间的电连接。

公开(公告)号：US10679921B2

公开(公告)日：2020-06-09

申请号：US16162012

申请日：2018-10-16

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L21/00 ,  H01L23/02 ,  H01L23/367 ,  H01L25/065 ,  H01L23/48 ,  H01L21/56 ,  H01L23/13 ,  H01L23/498 ,  H01L21/48

Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Vias may directly electrically connect the uppermost semiconductor die to the substrate.

公开(公告)号：US20190051578A1

公开(公告)日：2019-02-14

申请号：US16162012

申请日：2018-10-16

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L23/367 ,  H01L21/56 ,  H01L23/48 ,  H01L21/48 ,  H01L25/065 ,  H01L23/498 ,  H01L23/13

Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Vias may directly electrically connect the uppermost semiconductor die to the substrate.

公开(公告)号：US10134655B2

公开(公告)日：2018-11-20

申请号：US15874406

申请日：2018-01-18

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L21/00 ,  H01L23/02 ,  H01L23/367 ,  H01L25/065 ,  H01L23/48 ,  H01L21/56 ,  H01L23/13 ,  H01L23/498 ,  H01L21/48

Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate.

公开(公告)号：US09899293B2

公开(公告)日：2018-02-20

申请号：US15401762

申请日：2017-01-09

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L21/00 ,  H01L21/44 ,  H01L23/367 ,  H01L25/065 ,  H01L21/56 ,  H01L23/48 ,  H01L21/48

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/13 ,  H01L23/367 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/18161 ,  H01L2924/00

Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate. A heat sink may be located on a side of the uppermost semiconductor die opposite the substrate. A passivation material may be located between the uppermost semiconductor die and the heat sink.

公开(公告)号：US09543274B2

公开(公告)日：2017-01-10

申请号：US14605466

申请日：2015-01-26

Applicant: Micron Technology, Inc.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L21/00 ,  H01L23/02 ,  H01L25/065 ,  H01L23/48 ,  H01L21/56 ,  H01L23/13

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/13 ,  H01L23/367 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/18161 ,  H01L2924/00

Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. The stack of semiconductor dice may include vias extending through each semiconductor die of the stack for electrically interconnecting the semiconductor dice in the stack to one another and to the substrate. Another semiconductor die may be electrically connected to the stack of semiconductor dice and may be located on a side of the stack of semiconductor dice opposing the substrate. The other semiconductor die may be a heat-generating component configured to generate more heat than each semiconductor die of the stack of semiconductor dice. Electrical connectors may be located laterally adjacent to the vias and may form electrical connections between the substrate and the other semiconductor die in isolation from integrated circuitry of the semiconductor dice in the stack.

Abstract translation: 根据本公开的半导体器件封装可以包括衬底和附接到衬底的半导体管芯堆叠。 半导体晶片的堆叠可以包括延伸穿过堆叠的每个半导体管芯的通孔，用于将堆叠中的半导体管芯彼此彼此和衬底电互连。 另一个半导体管芯可以电连接到半导体管芯的堆叠，并且可以位于与衬底相对的半导体管芯堆叠的一侧。 另一个半导体管芯可以是被配置成比半导体管芯堆叠的每个半导体管芯产生更多的热量的发热部件。 电连接器可以位于横向邻近通孔的位置，并且可以在堆叠中的半导体裸片的集成电路之外形成衬底和另一半导体管芯之间的电连接。

公开(公告)号：US20140327130A1

公开(公告)日：2014-11-06

申请号：US14334870

申请日：2014-07-18

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Steven Groothuis ,  Jian Li ,  Shijian Luo

IPC: H01L23/367 ,  H01L23/433

CPC classification number: H01L23/367 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/34 ,  H01L23/433 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/00014

Abstract: Semiconductor devices may include a first semiconductor die comprising a heat-generating region located at a periphery thereof. A second semiconductor die is attached to the first semiconductor die. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die. Methods of forming semiconductor devices may involve attaching a second semiconductor die to a first semiconductor die. The first semiconductor die includes a heat-generating region at a periphery thereof. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die.

Abstract translation: 半导体器件可以包括第一半导体管芯，其包括位于其周边的发热区域。 第二半导体管芯附接到第一半导体管芯。 发热区域的至少一部分位于第二半导体管芯的覆盖区的横向外侧。 绝热材料位于第二半导体管芯的侧表面上。 形成半导体器件的方法可以包括将第二半导体管芯附接到第一半导体管芯。 第一半导体管芯包括在其周边的发热区域。 发热区域的至少一部分位于第二半导体管芯的覆盖区的横向外侧。 绝热材料位于第二半导体管芯的侧表面上。