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    Managing Read Timing in Semiconductor Devices
    1.
    发明公开
    Managing Read Timing in Semiconductor Devices 审中-公开

    公开(公告)号：US20240311014A1

    公开(公告)日：2024-09-19

    申请号：US18524337

    申请日：2023-11-30

    Applicant: Macronix International Co., Ltd.

    Inventor： Wu-Chin Peng ,  Ken-Hui Chen ,  Chun-Hsiung Hung

    IPC: G06F3/06

    CPC classification number: G06F3/0613 ,  G06F3/0659 ,  G06F3/0679

    Abstract: Systems, devices, methods, and circuits for managing read timing in semiconductor devices are provided. In one aspect, a semiconductor device includes: a memory array configured to store data and a circuitry coupled to the memory array and configured to read stored data from the memory array. The circuitry is configured to: obtain a starting address of target data to be read based on a read instruction, determine that the starting address is in a first address group of a plurality of address groups, each of the plurality of address groups being associated with a respective reading speed, and read out the target data from the memory array based on the starting address being in the first address group.

    Power source for memory circuitry
    6.
    发明授权
    Power source for memory circuitry 有权

    公开(公告)号：US09881654B2

    公开(公告)日：2018-01-30

    申请号：US14877723

    申请日：2015-10-07

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Wu-Chin Peng ,  Chun-Yi Lee ,  Ken-Hui Chen ,  Kuen-Long Chang ,  Chun Hsiung Hung

    IPC: G11C5/14

    CPC classification number: G11C5/145

    Abstract: An integrated circuit comprises a power supply input pin receiving an off-chip supply voltage having a variable current, an on-chip power source powered by the off-chip supply voltage and providing a regulated current, a memory array, and a set of one or more circuits coupled to the memory array and powered by the regulated current from the on-chip power source. The IC can include control circuitry performing memory operations on the memory array, said control circuitry powered by at least the off-chip supply voltage from the power supply pin.

    Power source for memory circuitry
    7.
    发明授权
    Power source for memory circuitry 有权
    存储器电路的电源

    公开(公告)号：US09536575B2

    公开(公告)日：2017-01-03

    申请号：US14877692

    申请日：2015-10-07

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Wu-Chin Peng ,  Chun-Yi Lee ,  Ken-Hui Chen ,  Kuen-Long Chang ,  Chun Hsiung Hung

    IPC: G11C7/12 ,  G11C5/14

    CPC classification number: G11C5/145 ,  G11C7/12 ,  G11C8/08

    Abstract: An integrated circuit comprises a power supply input pin for receiving an off-chip supply voltage which can have a variable current, an on-chip power source to be powered by the off-chip supply voltage and which can provide a regulated current, a set of one or more circuits to be powered by at least one of the off-chip supply voltage and the on-chip power source, a configuration memory storing a set of one or more memory settings that indicate whether a circuit of said set of one or more circuits is powered by the on-chip power source, and control circuitry responsive to the at least one memory setting to control whether said circuit of said set of one or more circuits is powered by the on-chip power source.

    Abstract translation: 集成电路包括用于接收可以具有可变电流的芯片外电源电压的电源输入引脚，由芯片外电源电压供电并且可以提供调节电流的片上电源，一组 一个或多个电路由芯片外电源电压和片上电源中的至少一个供电;配置存储器，存储一组或多个存储器设置，其指示所述一组或多个电路 更多的电路由片上电源供电，以及响应于至少一个存储器设置的控制电路，以控制所述一组或多个电路的所述电路是否由片上电源供电。

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