Flexible template having embedded gate array and composable memory for integrated circuits
    1.
    发明授权
    Flexible template having embedded gate array and composable memory for integrated circuits 有权
    具有嵌入式门阵列和集成电路可组合存储器的灵活模板

    公开(公告)号:US07831653B2

    公开(公告)日:2010-11-09

    申请号:US10318792

    申请日:2002-12-13

    IPC分类号: G06F15/16

    CPC分类号: H04L69/12

    摘要: A partially manufactured semiconductor chip comprising a slice and a number of shells is a template for a communication and networking chip. The slice has a number of I/O ports, blocks, and PHYs. The hardmac PHYs are established to correspond to a high speed data transmission protocol. The interior of the template comprises logic gate arrays and configurable memory. Once particular protocols of data receipt and transmission are selected, the logic gate arrays and configurable memory can be programmed and otherwise configured to develop protocol layers for data networking and communication.

    摘要翻译: 包括片和多个壳的部分制造的半导体芯片是用于通信和网络芯片的模板。 该片具有多个I / O端口,块和PHY。 硬件PHY被建立为对应于高速数据传输协议。 模板的内部包括逻辑门阵列和可配置存储器。 一旦选择了数据接收和传输的特定协议,逻辑门阵列和可配置存储器可以被编程,否则被配置为开发用于数据联网和通信的协议层。

    Integrated circuit having integrated programmable gate array and method of operating the same
    2.
    发明授权
    Integrated circuit having integrated programmable gate array and method of operating the same 失效
    具有集成可编程门阵列的集成电路及其操作方法

    公开(公告)号:US06934597B1

    公开(公告)日:2005-08-23

    申请号:US10106432

    申请日:2002-03-26

    IPC分类号: G06F15/78 G06F19/00

    CPC分类号: G06F15/7867

    摘要: An integrated circuit (IC) and a method of manufacturing an integrated circuit suited for a particular application. In one embodiment, the IC includes: (1) at least two interfaces, (2) a programmable gate array (PGA) coupled to the at least two interfaces for communicating data therebetween and, optionally (3) a field-programmable gate array (FPGA) coupled to and configured to cooperate with the PGA to adapt the IC to a particular surrounding environment.

    摘要翻译: 一种集成电路(IC)和一种制造适用于特定应用的集成电路的方法。 在一个实施例中,IC包括:(1)至少两个接口,(2)耦合到所述至少两个接口的可编程门阵列(PGA),用于在其间传送数据;以及可选地(3)现场可编程门阵列 FPGA),其耦合并配置成与PGA协作以使IC适应于特定的周围环境。

    Integrated circuit having integrated programmable gate array and field programmable gate array, and method of operating the same
    3.
    发明授权
    Integrated circuit having integrated programmable gate array and field programmable gate array, and method of operating the same 有权
    具有集成可编程门阵列和现场可编程门阵列的集成电路及其操作方法

    公开(公告)号:US06904586B1

    公开(公告)日:2005-06-07

    申请号:US10105579

    申请日:2002-03-25

    IPC分类号: G06F15/78 G06F17/50

    CPC分类号: G06F17/5054 G06F15/7867

    摘要: An integrated circuit (IC) and a method of manufacturing an integrated circuit suited for a particular application. In one embodiment, the IC includes at least two interfaces, a field-programmable gate array (FPGA) and a programmable gate array (PGA). The FPGA has a configuration memory associated therewith and is coupled to the at least two interfaces for communicating data therebetween. The PGA is coupled to and configured to cooperate with the FPGA to adapt the IC to a particular surrounding environment.

    摘要翻译: 一种集成电路(IC)和一种制造适用于特定应用的集成电路的方法。 在一个实施例中,IC包括至少两个接口,现场可编程门阵列(FPGA)和可编程门阵列(PGA)。 FPGA具有与其相关联的配置存储器,并且耦合到至少两个接口以在其间传送数据。 PGA被耦合到并配置成与FPGA配合以使IC适应特定的周围环境。

    Time division media access controller and method of operation thereof
    5.
    发明授权
    Time division media access controller and method of operation thereof 有权
    时分介质访问控制器及其操作方法

    公开(公告)号:US07233604B1

    公开(公告)日:2007-06-19

    申请号:US10162504

    申请日:2002-06-04

    IPC分类号: H04J3/00 H04L12/56

    摘要: A time division media access controller for use with a multi-port data switch and a method of controlling media access. In one embodiment, the time division media access controller includes a time division receive engine, a time division transmit engine and a time division arbiter coupled to the time division receive and transmit engines. The time division receive engine accepts data from a plurality of data ports and the time division transmit engine provides data to a plurality of data ports. The time division arbiter controls states of the time division receive and transmit engines based on throughput requirements of the data. In preferred embodiments, the time division media access controller complies with the IEEE 802.3 ethernet standard.

    摘要翻译: 用于多端口数据交换机的时分媒体接入控制器和控制媒体接入的方法。 在一个实施例中,时分介质访问控制器包括时分接收引擎,时分传输引擎和耦合到时分接收和发送引擎的时分仲裁器。 时分接收引擎接收来自多个数据端口的数据,时分发送引擎向多个数据端口提供数据。 时分仲裁器基于数据的吞吐量要求来控制时分接收和发送引擎的状态。 在优选实施例中,时分介质访问控制器符合IEEE 802.3以太网标准。

    Method and apparatus for correcting horizontal, vertical and framing
errors in motion picture film transfer
    6.
    发明授权
    Method and apparatus for correcting horizontal, vertical and framing errors in motion picture film transfer 失效
    用于校正电影胶片传输中的水平,垂直和成帧错误的方法和装置

    公开(公告)号:US5555092A

    公开(公告)日:1996-09-10

    申请号:US259125

    申请日:1988-10-18

    IPC分类号: H04N3/36 H04N5/86

    CPC分类号: H04N3/36

    摘要: A film correction system adjusts a relative position of film containing an area for information and a scanner of the film area. The system includes a scanner for scanning the film area at a film plane. A film drive moves the film along the film plane. A focused beam separate from the film area scanner scans a film edge in the film for determining a location of the film edge. A circuit is coupled to the focused beam scanner for changing a relative position of the film area scanner and the film area. The film edge scanner is a flying spot scanner, and the apparatus includes signal processors for processing the sprocket information. The system may be retrofit to an existing telecine apparatus. A separate coil may be used to provide deflection of a flying spot scanner used to scan the picture information on the film.

    摘要翻译: 胶片校正系统调整包含信息区域和胶卷区域的扫描仪的胶片的相对位置。 该系统包括用于在胶片平面上扫描胶片区域的扫描仪。 胶片驱动器沿胶片平面移动胶片。 与胶片区域扫描仪分离的聚焦光束扫描胶片中的胶片边缘,以确定胶片边缘的位置。 电路耦合到聚焦光束扫描器,用于改变胶片区域扫描仪和胶片区域的相对位置。 胶片边缘扫描器是飞点扫描器,该装置包括用于处理链轮信息的信号处理器。 该系统可以改进现有的电视电影设备。 可以使用单独的线圈来提供用于扫描胶片上的图像信息的飞点扫描仪的偏转。