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    METHOD FOR PERFORMING CHEMICAL SHRINK PROCESS OVER BARC (BOTTOM ANTI-REFLECTIVE COATING)
    3.
    发明申请
    METHOD FOR PERFORMING CHEMICAL SHRINK PROCESS OVER BARC (BOTTOM ANTI-REFLECTIVE COATING) 有权
    用于在BARC（底部防反射涂层）上进行化学收缩过程的方法

    公开(公告)号：US20080020198A1

    公开(公告)日：2008-01-24

    申请号：US11831137

    申请日：2007-07-31

    申请人： Todd Bailey ,  Colin Brodsky ,  Allen Gabor

    发明人： Todd Bailey ,  Colin Brodsky ,  Allen Gabor

    IPC分类号： B32B3/26 ,  B05D5/12 ,  C23F1/00

    CPC分类号： H01L21/76802 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/76816 ,  Y10T428/24322 ,  Y10T428/24331 ,  Y10T428/24521 ,  Y10T428/249953

    摘要： A structure and a method for forming the same. The method comprises providing a structure including (a) a hole layer, (b) a BARC (bottom antireflective coating) layer on the top of the hole layer, and (c) a patterned photoresist layer on top of the BARC layer and having a photoresist hole; etching the BARC layer through the photoresist hole to extend the photoresist hole to the hole layer; performing the chemical shrinking process to shrink the extended photoresist hole; and etching the hole layer through the shrunk, extended photoresist hole so as to form a hole in the hole layer.

    摘要翻译： 一种结构及其形成方法。 该方法包括提供一种结构，其包括（a）空穴层，（b）在空穴层顶部的BARC（底部抗反射涂层）层，和（c）在BARC层的顶部上的图案化光致抗蚀剂层， 光致抗蚀剂孔; 通过光致抗蚀剂孔蚀刻BARC层以将光致抗蚀剂孔延伸到孔层; 执行化学收缩过程以收缩延伸的光致抗蚀剂孔; 并且通过收缩的延伸的光致抗蚀剂孔蚀刻孔层，以在孔层中形成孔。

    METHOD FOR PERFORMING CHEMICAL SHRINK PROCESS OVER BARC (BOTTOM ANTI-REFLECTIVE COATING)
    4.
    发明申请
    METHOD FOR PERFORMING CHEMICAL SHRINK PROCESS OVER BARC (BOTTOM ANTI-REFLECTIVE COATING) 失效
    用于在BARC（底部防反射涂层）上进行化学收缩过程的方法

    公开(公告)号：US20070010091A1

    公开(公告)日：2007-01-11

    申请号：US11160670

    申请日：2005-07-05

    申请人： Todd Bailey ,  Colin Brodsky ,  Allen Gabor

    发明人： Todd Bailey ,  Colin Brodsky ,  Allen Gabor

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76802 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/76816 ,  Y10T428/24322 ,  Y10T428/24331 ,  Y10T428/24521 ,  Y10T428/249953

    摘要： A structure and a method for forming the same. The method comprises providing a structure including (a) a hole layer, (b) a BARC (bottom antireflective coating) layer on the top of the hole layer, and (c) a patterned photoresist layer on top of the BARC layer and having a photoresist hole; etching the BARC layer through the photoresist hole to extend the photoresist hole to the hole layer; performing the chemical shrinking process to shrink the extended photoresist hole; and etching the hole layer through the shrunk, extended photoresist hole so as to form a hole in the hole layer.

    摘要翻译： 一种结构及其形成方法。 该方法包括提供一种结构，其包括（a）空穴层，（b）在空穴层顶部的BARC（底部抗反射涂层）层，和（c）在BARC层的顶部上的图案化光致抗蚀剂层， 光致抗蚀剂孔; 通过光致抗蚀剂孔蚀刻BARC层以将光致抗蚀剂孔延伸到孔层; 执行化学收缩过程以收缩延伸的光致抗蚀剂孔; 并且通过收缩的延伸的光致抗蚀剂孔蚀刻孔层，以在孔层中形成孔。

    METHOD FOR REDUCING WITHIN CHIP DEVICE PARAMETER VARIATIONS
    5.
    发明申请
    METHOD FOR REDUCING WITHIN CHIP DEVICE PARAMETER VARIATIONS 有权
    用于在芯片设备参数变化中减少的方法

    公开(公告)号：US20070264729A1

    公开(公告)日：2007-11-15

    申请号：US11382489

    申请日：2006-05-10

    申请人： Brent Anderson ,  Shahid Butt ,  Allen Gabor ,  Patrick Lindo ,  Edward Nowak ,  Jed Rankin

    发明人： Brent Anderson ,  Shahid Butt ,  Allen Gabor ,  Patrick Lindo ,  Edward Nowak ,  Jed Rankin

    IPC分类号： H01L21/66 ,  G01R31/26

    CPC分类号： H01L22/20

    摘要： A method of reducing parametric variation in an integrated circuit (IC) chip and an IC chip with reduced parametric variation. The method includes: on a first wafer having a first arrangement of chips, each IC chip divided into a second arrangement of regions, measuring a test device parameter of test devices distributed in different regions; and on a second wafer having the first arrangement of IC chips and the second arrangement of regions, adjusting a functional device parameter of identically designed field effect transistors within one or more regions of all IC chips of the second wafer based on a values of the test device parameter measured on test devices in regions of the IC chip of the first wafer by a non-uniform adjustment of physical or metallurgical polysilicon gate widths of the identically designed field effect transistors from region to region within each IC chip.

    摘要翻译： 一种降低参数变化减小的集成电路（IC）芯片和IC芯片的参数变化的方法。 该方法包括：在具有第一芯片布置的第一晶片上，将每个IC芯片分成第二区域布置，测量分布在不同区域中的测试装置的测试装置参数; 并且在具有IC芯片的第一布置和第二区域布置的第二晶片上，基于测试值调整第二晶片的所有IC芯片的一个或多个区域内相同设计的场效应晶体管的功能器件参数 在第一晶片的IC芯片的区域中的测试装置上测量的器件参数通过在每个IC芯片内的区域到区域的相同设计的场效应晶体管的物理或冶金多晶硅栅极宽度的不均匀调整而不均匀地调整。

    TOPOGRAPHY COMPENSATED FILM APPLICATION METHODS
    6.
    发明申请
    TOPOGRAPHY COMPENSATED FILM APPLICATION METHODS 有权
    地形补偿膜应用方法

    公开(公告)号：US20070249070A1

    公开(公告)日：2007-10-25

    申请号：US11276707

    申请日：2006-03-10

    申请人： Colin Brodsky ,  Scott Bukofsky ,  Allen Gabor

    发明人： Colin Brodsky ,  Scott Bukofsky ,  Allen Gabor

    IPC分类号： H01L21/66 ,  H01L21/31

    CPC分类号： H01L21/0271 ,  H01L21/0276

    摘要： Methods for applying topographically compensated film in a semiconductor wafer fabrication process are disclosed. The processes include premapping a surface of a wafer so as to determine the local topography (e.g., z-height) of the wafer and then applying a variable depth of a film to the wafer, such that the variable depth is modulated based on the local topography of the wafer. The resultant topography of the applied film and wafer is substantially planar (e.g., within approximately 100 nm) across the wafer.

    摘要翻译： 公开了在半导体晶片制造工艺中应用地形学补偿膜的方法。 这些过程包括预先处理晶片的表面，以便确定晶片的局部形貌（例如，z-高度），然后将薄膜的可变深度施加到晶片，使得可变深度基于本地 晶圆的形貌。 所施加的膜和晶片的所得形貌在晶片上基本上是平面的（例如在大约100nm内）。

    Binary OPC for assist feature layout optimization
    7.
    发明申请
    Binary OPC for assist feature layout optimization 失效
    二进制OPC用于辅助功能布局优化

    公开(公告)号：US20060057475A1

    公开(公告)日：2006-03-16

    申请号：US11251981

    申请日：2005-10-17

    申请人： Lars Liebmann ,  Richard Ferguson ,  Allen Gabor ,  Mark Lavin

    发明人： Lars Liebmann ,  Richard Ferguson ,  Allen Gabor ,  Mark Lavin

    IPC分类号： G03C5/00 ,  G03F1/00

    CPC分类号： G03F1/36

    摘要： A method of forming a photolithographic mask layout with Sub-Resolution Assist Feature (SRAF) elements on a mask for correcting for proximity effects for a pattern imaged comprising the steps of developing a layout of mask features for printing main pattern features. Provide a table of SRAF element data including spacing of main pattern features and SRAF elements, applying SRAF elements to the mask layout as a function of spacing of main pattern features and SRAF elements, legalizing the SRAF elements as a function of style options, and providing a target pattern comprising a modified layout for the mask, identifying problem edge segments of an SRAF element of the target pattern at risk of causing a printing defect, applying a selected bias to the problem edge segments to modify the pattern where there are areas of SRAF element loss, and providing an output of a modified pattern with modified SRAF elements removing the areas of SRAF element loss. The system can provide SRAF elements to the mask layout as a function of spacing of main pattern features and SRAF elements may be based on data from the SRAF table; or the system can applying model based OPC for exposure dose values based on data from the SRAF table.

    摘要翻译： 一种用于在掩模上形成具有子分辨率辅助特征（SRAF）元素的光刻掩模布局的方法，用于校正所成像的图案的邻近效应，包括以下步骤：开发用于打印主图案特征的掩模特征的布局。 提供SRAF元素数据的表格，包括主图案特征和SRAF元素的间距，将SRAF元素应用于蒙版布局，作为主图案特征和SRAF元素间距的函数，将SRAF元素合并为样式选项的函数，并提供 包括用于掩模的修改的布局的目标图案，识别目标图案的SRAF元素的问题边缘片段，导致打印缺陷的风险，将选定的偏差应用于问题边缘片段以修改存在SRAF的区域的图案 元件损耗，以及修改的图案的输出，其中修改的SRAF元件去除SRAF元件损耗的区域。 系统可以根据主模式特征的间隔向掩模布局提供SRAF元素，SRAF元素可以基于来自SRAF表的数据; 或者系统可以基于来自SRAF表的数据对基于模型的OPC应用曝光剂量值。