摘要:
In at least one embodiment a ripple, generated in an electric potential of data signal lines even in long-term reversal driving, is reduced and display quality is improved. In at least one example embodiment, the liquid crystal display apparatus of the present invention includes scanning signal lines and data signal lines, in which one scanning pulse is outputted to select one scanning signal line, each of the data signal lines receives data signals whose polarities are reversed per one vertical scanning period while in one horizontal scanning period, one of two data signal lines receives a data signal having a polarity and the other of the two data signal lines receives another data signal having another polarity, the two data signal lines being arranged adjacent to each other, scanning pulses are successively outputted in sets of two, and at a timing in which two scanning pulses fall, two scanning pulses rise.
摘要:
In one embodiment of the present invention, each pixel includes first and second subpixels. CS bus lines connected to the respective storage capacitors of the first and second subpixels are electrically independent of each other. A CS voltage has a waveform that inverts its polarity at least once a frame, which includes a first subframe for sequentially scanning a series of odd rows and a second SF for sequentially scanning even rows that have been skipped during the first SF. A source signal voltage varies so as to have two frames or subframes with mutually opposite polarities. A CS voltage has a waveform that has quite opposite consequences on the effective voltage of a subpixel of a pixel connected to the jth scan line to be selected during the first subframe and on that of another subpixel of a pixel connected to the (j+1)th scan line to be selected during the second subframe. In this manner, the deterioration in display quality, which would be caused if either a source line inversion drive or a block inversion drive is applied to a multi-pixel technology, can be minimized.
摘要:
In one embodiment of the present invention, each pixel includes first and second subpixels. CS bus lines connected to the respective storage capacitors of the first and second subpixels are electrically independent of each other. A CS voltage has a waveform that inverts its polarity at least once a frame, which includes a first subframe for sequentially scanning a series of odd rows and a second SF for sequentially scanning even rows that have been skipped during the first SF. A source signal voltage varies so as to have two frames or subframes with mutually opposite polarities. A CS voltage has a waveform that has quite opposite consequences on the effective voltage of a subpixel of a pixel connected to the jth scan line to be selected during the first subframe and on that of another subpixel of a pixel connected to the (j+1)th scan line to be selected during the second subframe. In this manner, the deterioration in display quality, which would be caused if either a source line inversion drive or a block inversion drive is applied to a multi-pixel technology, can be minimized.
摘要:
In at least one embodiment a ripple, generated in an electric potential of data signal lines even in long-term reversal driving, is reduced and display quality is improved. In at least one example embodiment, the liquid crystal display apparatus of the present invention includes scanning signal lines and data signal lines, in which one scanning pulse is outputted to select one scanning signal line, each of the data signal lines receives data signals whose polarities are reversed per one vertical scanning period while in one horizontal scanning period, one of two data signal lines receives a data signal having a polarity and the other of the two data signal lines receives another data signal having another polarity, the two data signal lines being arranged adjacent to each other, scanning pulses are successively outputted in sets of two, and at a timing in which two scanning pulses fall, two scanning pulses rise.
摘要:
A liquid crystal display device of the present invention has a vertical scanning period in which the polarity of a display signal is positive and a vertical scanning period in which the polarity of a display signal is negative. When a pair of successive two vertical scanning periods is constituted by a first vertical scanning period and a second vertical scanning period, and when a target gradation level to be displayed in the first vertical scanning period is GL1, and a target gradation level to be displayed in the second vertical scanning period immediately after the first vertical scanning period is GL2, GL1 and GL2 being integers of 0 or more representing gradation levels, the liquid crystal display device includes a circuit (124) capable of supplying a display voltage corresponding to a gradation level to a pixel in the second vertical scanning period, the gradation level being expressed by GL2OD which satisfies a condition where |GL2OD-GL1| is larger than |GL2-GL1|, in the case where GL2 is different from GL1. The value of GL2OD when the polarity in the first vertical scanning period is positive and the polarity in the second vertical scanning period is negative is different from the value of GL2OD when the polarity in the first vertical scanning period is negative and the polarity in the second vertical scanning period is positive.
摘要:
A liquid crystal display device includes a liquid crystal panel in which a plurality of pixels (A) are arranged. A storage capacitor (Cs) is provided in each pixel (A) of liquid crystal panel. The storage capacitor (Cs) is connected to a Cs bus line. The liquid crystal display device includes a plurality of Cs bus lines. The Cs bus line is connected to a stem line. The stem line transfers a driving signal to the storage capacitor (Cs) via the Cs bus line. The liquid crystal display device includes a bridge line, separate from the stem line, for connecting a plurality of Cs bus lines.
摘要:
In one embodiment of the present invention, a gate driver creates a dummy insertion period in which the driver does not apply a gate on pulse to a scanning signal line immediately after the time of the inversion of a data signal. When a period from the time of the application of the gate on pulse to an odd numbered or even numbered scanning signal line to which the gate on pulse is applied previously to the time of the application of the gate on pulse to an even numbered or odd numbered scanning signal line to which the gate on pulse is applied later is set as an adjacent line writing time lag period for two scanning signal lines adjacent to each other, a CS control circuit allows the polarity of every CS signal to be reversed on the same cycle at least in the adjacent line writing time lag period. This makes it possible to provide a liquid crystal display device capable of offering high quality display in which unevenness in the display is suppressed without being affected by the blunt waveform of the data signal and the blunt waveform of a retention volume signal at the time of the inversion.
摘要:
A liquid crystal display device of the present invention has a vertical scanning period in which the polarity of a display signal is positive and a vertical scanning period in which the polarity of a display signal is negative. When a pair of successive two vertical scanning periods is constituted by a first vertical scanning period and a second vertical scanning period, and when a target gradation level to be displayed in the first vertical scanning period is GL1, and a target gradation level to be displayed in the second vertical scanning period immediately after the first vertical scanning period is GL2, GL1 and GL2 being integers of 0 or more representing gradation levels, the liquid crystal display device includes a circuit (124) capable of supplying a display voltage corresponding to a gradation level to a pixel in the second vertical scanning period, the gradation level being expressed by GL2OD which satisfies a condition where |GL2OD-GL1| is larger than |GL2-GL1|, in the case where GL2 is different from GL1. The value of GL2OD when the polarity in the first vertical scanning period is positive and the polarity in the second vertical scanning period is negative is different from the value of GL2OD when the polarity in the first vertical scanning period is negative and the polarity in the second vertical scanning period is positive.
摘要:
The present invention is to provide a liquid crystal display device which hardly causes image sticking even when there is a difference in the pixel areas. The liquid crystal display device of the present invention includes a pair of substrates, and a liquid crystal layer sandwiched between the pair of substrates, and is configured such that a pixel is formed by picture elements of a plurality of colors. The liquid crystal display device of the present invention is featured in that one of the pair of substrates includes scanning lines, signal lines, and storage capacitor lines, a thin film transistor connected to each of the scanning line and the signal line, and a pixel electrode connected to the thin film transistor, in that the other of the pair of substrates includes an opposed electrode, in that the pixel electrode is arranged for each of the picture elements, and in that the pixel electrode having a larger area among the plurality of pixel electrodes arranged in one pixel is connected to the thin film transistor having a larger channel width among the plurality of the thin film transistors arranged in the one pixel.
摘要:
In a liquid crystal display device according to one embodiment of the present invention, when the polarities of the source signal voltages do not change over a plurality of horizontal scanning periods, the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the jth row rises before the source signal voltages change to values that correspond to pixels along the jth row. Next, the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the jth row falls, and then the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the kth row (j≠k) rises. The polarities of the storage capacitor signal voltages applied to storage capacitor bus lines that correspond to sub-pixels of pixels along the jth row are inverted after the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the kth row rises.