公开(公告)号：US6138248A

公开(公告)日：2000-10-24

申请号：US1224

申请日：1997-12-30

申请人： Masahiko Saito ,  Hidehito Takewa ,  Kenichi Kurosawa ,  Yoshihiro Miyazaki ,  Shigenori Kaneko

发明人： Masahiko Saito ,  Hidehito Takewa ,  Kenichi Kurosawa ,  Yoshihiro Miyazaki ,  Shigenori Kaneko

IPC分类号： G06F11/20 ,  G06F11/16 ,  G06F12/08 ,  G06F15/16 ,  G06F15/177

CPC分类号： G06F11/20 ,  G06F11/0727 ,  G06F11/2028 ,  G06F11/2046 ,  G06F11/0793 ,  G06F11/2038

摘要： A computer and a backup computer exchange periodic report signal transmissions by way of SVP115. When there is no periodic report signal transmission from the main computer, the backup computer makes a main computer status inquiry and if one location is malfunctioning resets the main computer by way of the SVP115 and continues the processing. When permanent damage is present, the SVP115 continually resets the main computer and controls MOS switches of the common disk unit to isolate the SCSI from the main computer and continue the main computer processing.

摘要翻译： 计算机和备份计算机通过SVP115交换周期性报告信号传输。 当主计算机没有定期报告信号传输时，备份计算机进行主计算机状态查询，如果一个位置发生故障，则通过SVP115复位主机，并继续处理。 当存在永久性损坏时，SVP115会连续复位主计算机，并控制公共磁盘单元的MOS开关，使SCSI与主计算机隔离，并继续进行主机处理。

公开(公告)号：US5968160A

公开(公告)日：1999-10-19

申请号：US923632

申请日：1997-09-04

申请人： Masahiko Saito ,  Kenichi Kurosawa ,  Yoshiki Kobayashi ,  Tadaaki Bandoh ,  Masahiro Iwamura ,  Takashi Hotta ,  Yasuhiro Nakatsuka ,  Shigeya Tanaka ,  Takeshi Takemoto

发明人： Masahiko Saito ,  Kenichi Kurosawa ,  Yoshiki Kobayashi ,  Tadaaki Bandoh ,  Masahiro Iwamura ,  Takashi Hotta ,  Yasuhiro Nakatsuka ,  Shigeya Tanaka ,  Takeshi Takemoto

IPC分类号： G06F9/30 ,  G06F9/318 ,  G06F9/38 ,  G06F12/08 ,  G06F15/173 ,  G06F15/80 ,  G06F15/16

CPC分类号： G06F9/3891 ,  G06F12/084 ,  G06F15/17381 ,  G06F15/8015 ,  G06F9/30087 ,  G06F9/3009 ,  G06F9/30181 ,  G06F9/3802 ,  G06F9/3814 ,  G06F9/3822 ,  G06F9/3824 ,  G06F9/3836 ,  G06F9/3851 ,  G06F9/3885

摘要： A data processing system having flexibility coping with parallelism of a program comprises a plurality of processor elements for executing instructions, a main memory shared by the plurality of processor elements, and a plurality of parallel operation control facilities for enabling the plurality of processor elements to operate in synchronism. The plurality of parallel operation control facilities are provided in correspondence to the plurality of processor elements, respectively. The data processing system further comprises a multiprocessor operation control facility for enabling the plurality of processor elements to operate independently, and a flag for holding a value indicating which of the parallel operation mode or the multiprocessor mode is to be activated. The shared cache memory is implemented in a blank instruction and controlled by a cache controller so that inconsistency of the data stored in the cache memory is eliminated.

摘要翻译： 具有应对程序的并行性的灵活性的数据处理系统包括用于执行指令的多个处理器元件，由多个处理器元件共享的主存储器和用于使多个处理器元件能够操作的多个并行操作控制设备 同步。 分别对应于多个处理器元件提供多个并行操作控制设备。 数据处理系统还包括多处理器操作控制设备，用于使多个处理器元件能够独立地操作，以及用于保持指示并行操作模式或多处理器模式中的哪一个被激活的值的标志。 共享高速缓冲存储器以空白指令实现并由高速缓存控制器控制，从而消除了存储在高速缓冲存储器中的数据的不一致性。

公开(公告)号：US5784630A

公开(公告)日：1998-07-21

申请号：US367928

申请日：1995-01-03

申请人： Masahiko Saito ,  Kenichi Kurosawa ,  Yoshiki Kobayashi ,  Tadaaki Bandoh ,  Masahiro Iwamura ,  Takashi Hotta ,  Yasuhiro Nakatsuka ,  Shigeya Tanaka ,  Takeshi Takemoto

发明人： Masahiko Saito ,  Kenichi Kurosawa ,  Yoshiki Kobayashi ,  Tadaaki Bandoh ,  Masahiro Iwamura ,  Takashi Hotta ,  Yasuhiro Nakatsuka ,  Shigeya Tanaka ,  Takeshi Takemoto

IPC分类号： G06F9/30 ,  G06F9/318 ,  G06F9/38 ,  G06F12/08 ,  G06F15/173 ,  G06F15/80

CPC分类号： G06F9/3891 ,  G06F12/084 ,  G06F15/17381 ,  G06F15/8015 ,  G06F9/30087 ,  G06F9/3009 ,  G06F9/30181 ,  G06F9/3802 ,  G06F9/3814 ,  G06F9/3822 ,  G06F9/3824 ,  G06F9/3836 ,  G06F9/3851 ,  G06F9/3885

摘要： A data processing system having flexibility coping with parallelism of a program comprises a plurality of processor elements for executing instructions, a main memory shared by the plurality of processor elements, and a plurality of parallel operation control facilities for enabling the plurality of processor elements to operate in synchronism. The plurality of parallel operation control facilities are provided in correspondence to the plurality of processor elements, respectively. The data processing system further comprises a multiprocessor operation control facility for enabling the plurality of processor elements to operate independently, and a flag for holding a value indicating which of the parallel operation mode or the multiprocessor mode is to be activated. The shared cache memory is implemented in a blank instruction and controlled by a cache controller so that inconsistency of the data stored in the cache memory is eliminated.

公开(公告)号：US09304789B2

公开(公告)日：2016-04-05

申请号：US13883452

申请日：2012-08-03

申请人： Kazuomi Kato ,  Masahiko Saito

发明人： Kazuomi Kato ,  Masahiko Saito

IPC分类号： G06F9/455 ,  G06F1/32 ,  G06F9/48

CPC分类号： G06F9/455 ,  G06F1/3228 ,  G06F9/4893 ,  Y02D10/24

摘要： A pseudo task generation requester 200 generates a request for generating a pseudo task 283 indicating that a certain one of CPUs is in an use state, and notifies a second OS 125 of the generation request, in the case where a task to be processed by a first virtual machine 110 is assigned to the one CPU, but a task to be processed by a second virtual machine 120 is not assigned to the one CPU. A pseudo task finishing requester 206 finishes the pseudo task 283 when a task in the first virtual machine 110 is finished with respect to the CPU to which the pseudo task 283 is assigned.

摘要翻译： 伪任务生成请求器200生成用于生成指示CPU中的某个CPU处于使用状态的伪任务283的请求，并且在第二OS 125通知由第一OS 125处理的任务的情况下生成生成请求 第一虚拟机110被分配给一个CPU，但是由第二虚拟机120处理的任务未分配给一个CPU。 当第一虚拟机110中的任务相对于分配有伪任务283的CPU完成时，伪任务完成请求器206完成伪任务283。

公开(公告)号：US09132036B2

公开(公告)日：2015-09-15

申请号：US12597384

申请日：2008-04-25

申请人： Akio Yamaguchi ,  Masatoshi Fukuda ,  Masahiko Saito

发明人： Akio Yamaguchi ,  Masatoshi Fukuda ,  Masahiko Saito

IPC分类号： A61F9/007 ,  A61B17/3211 ,  A61F9/013

CPC分类号： A61F9/0133 ,  A61B17/3211

摘要： [Problems] To ensure the sharpness of a stripping knife whereby a part of a living tissue is incised and stripped while preventing a cut along the thickness direction.[Means for Solving Problems] A stripping knife (A) having a plate-shaped blade (3) having an edge (1) around the periphery, a shank (5) connected to the blade (3), and a handle (7) holding the shank (5) in the integrated state, wherein the blade (3) is composed of the edge (1) formed at the front end and a guide face (2) which is formed between the edge (1) and the front face (3b) of the connected plate constituting the blade (3) and brought into contact with the surface (13) of the remaining tissue.

摘要翻译： [问题]为了确保剥离刀的清晰度，由此一边活动组织被切开并剥离，同时防止沿着厚度方向的切割。 解决问题的手段具有围绕周边具有边缘（1）的板状刀片（3）的剥离刀（A），连接到刀片（3）的柄（5）和手柄（7） 将所述柄（5）保持在一体状态，其中所述刀片（3）由形成在所述前端的边缘（1）和形成在所述边缘（1）和所述前表面 （3）的连接板（3b）并与其余组织的表面（13）接触。

公开(公告)号：US20140020086A1

公开(公告)日：2014-01-16

申请号：US14008785

申请日：2013-02-20

申请人： Tadao Tanikawa ,  Masahiko Saito ,  Katsushige Amano ,  Toshiaki Takeuchi

发明人： Tadao Tanikawa ,  Masahiko Saito ,  Katsushige Amano ,  Toshiaki Takeuchi

IPC分类号： G06F21/30

CPC分类号： G06F21/30 ,  G06F21/31 ,  G06F21/62 ,  G06F21/6245

摘要： A virtual machine system that restricts use of confidential information only to the case where an authentication has resulted in success. The virtual machine system includes first virtual machine, second virtual machine, and hypervisor. The first virtual machine includes: storage unit storing confidential information; and authentication unit configured to perform authentication and notify the hypervisor of result of the authentication. The second virtual machine uses virtual device that is virtualized storage device. When having received authentication result indicating authentication success from the authentication unit, the hypervisor enables the second virtual machine to access, as substance of the virtual device, storage area storing the confidential information, and when not having received the authentication result indicating the authentication success from the authentication unit, the hypervisor disables the second virtual machine from accessing the storage area storing the confidential information.

摘要翻译： 仅在身份验证已成功的情况下才限制使用机密信息的虚拟机系统。 虚拟机系统包括第一虚拟机，第二虚拟机和管理程序。 第一虚拟机包括：存储机密信息的存储单元; 以及认证单元，被配置为执行认证，并将所述认证结果通知所述管理程序。 第二个虚拟机使用虚拟化设备，即虚拟化存储设备。 当从认证单元接收到表示认证成功的认证结果时，管理程序使第二虚拟机能够作为虚拟设备的实体访问存储机密信息的存储区域，并且当没有接收到表示认证成功的认证结果时 认证单元，管理程序禁用第二虚拟机访问存储机密信息的存储区域。

公开(公告)号：US08489862B2

公开(公告)日：2013-07-16

申请号：US12663932

申请日：2008-06-05

申请人： Masahiko Saito ,  Masashige Mizuyama

发明人： Masahiko Saito ,  Masashige Mizuyama

IPC分类号： G06F15/00 ,  G06F15/76

CPC分类号： G06F1/3203 ,  G06F1/3287 ,  G06F1/329 ,  G06F1/3293 ,  G06F9/45533 ,  G06F9/52 ,  G06F12/0831 ,  G06F12/0864 ,  G06F2212/1028 ,  Y02D10/122 ,  Y02D10/13 ,  Y02D10/171 ,  Y02D10/24 ,  Y02D10/26 ,  Y02D10/28 ,  Y02D50/20

摘要： An object of the invention is to reduce the electric power consumption resulting from temporarily activating a processor requiring a large electric power consumption, out of a plurality of processors. A multiprocessor system (1) includes: a first processor (141) which executes a first instruction code; a second processor (151) which executes a second instruction code, a hypervisor (130) which converts the second instruction code into an instruction code executable by the first processor (141); and a power control circuit (170) which controls the operation of at least one of the first processor (141) and the second processor (151). When the operation of the second processor (151) is suppressed by the power control circuit (170), the hypervisor (130) converts the second instruction code into the instruction code executable by the first processor (141), and the first processor (141) executes the converted instruction code.

摘要翻译： 本发明的一个目的是减少由多个处理器中暂时激活需要大功率消耗的处理器所产生的电力消耗。 多处理器系统（1）包括：执行第一指令代码的第一处理器（141） 执行第二指令代码的第二处理器（151），将第二指令代码转换成可由第一处理器（141）执行的指令代码的管理程序（130）; 以及控制第一处理器（141）和第二处理器（151）中的至少一个的操作的功率控制电路（170）。 当由功率控制电路（170）抑制第二处理器（151）的操作时，管理程序（130）将第二指令代码转换为可由第一处理器（141）执行的指令代码，第一处理器（141） ）执行转换的指令代码。

公开(公告)号：US20130117745A1

公开(公告)日：2013-05-09

申请号：US13810024

申请日：2012-03-30

申请人： Teruo Kamiyama ,  Katsushige Amano ,  Masahiko Saito ,  Tadao Tanikawa

发明人： Teruo Kamiyama ,  Katsushige Amano ,  Masahiko Saito ,  Tadao Tanikawa

IPC分类号： G06F9/455

CPC分类号： G06F9/45558 ,  G06F12/1466 ,  G06F21/10 ,  G06F2009/45587

摘要： When a process judging unit 109 judges that a target process is a protected process 101, a key judging unit 111 judges whether a target key that is a key generated by a key generating unit 108 is a first key or a second key. When the key judging unit 111 judges that the target key is the first key, a VM communication managing unit 112 notifies the target process of a memory ID of a protected memory region 121 corresponding to the first key. When the process judging unit 109 judges that the target process is an unprotected process, a key transforming unit 110 transforms the target key from the first key to the second key based on the key transformation rule. An HV communication managing unit 105 notifies the target process of a memory ID of an unprotected memory region 122 corresponding to the second key.

摘要翻译： 当处理判断单元109判断目标处理是被保护处理101时，密钥判断单元111判断作为密钥生成单元108生成的密钥的目标密钥是第一密钥还是第二密钥。 当密钥判断单元111判断为目标密钥是第一密钥时，VM通信管理单元112向目标处理通知对应于第一密钥的受保护存储器区域121的存储器ID。 当处理判断单元109判断目标处理是不受保护的处理时，密钥变换单元110基于密钥变换规则将目标密钥从第一密钥转换为第二密钥。 HV通信管理单元105向目标处理通知对应于第二密钥的未受保护的存储区域122的存储器ID。

公开(公告)号：US20120226849A1

公开(公告)日：2012-09-06

申请号：US13508435

申请日：2010-12-13

申请人： Masahiko Saito

发明人： Masahiko Saito

IPC分类号： G06F12/02 ,  G06F12/08

CPC分类号： G06F12/10 ,  G06F9/5016 ,  G06F11/1438 ,  G06F11/1484 ,  G06F2201/815 ,  G06F2212/151

摘要： A virtual computer system having a plurality of virtual computers, the virtual computer system including: an area assignment unit operable to, when a virtual computer attempts to perform writing to a basic area which is assigned to and shared by the plurality of virtual computers, change an assignment to the virtual computer from the basic area to a copy area to which the basic area is copied and the writing is performed; and an area freeing unit operable to, when a content of the basic area matches a content of at least one copy area, change area assignment to one or more virtual computers, to which have been assigned one or more other areas than one area among the areas whose contents match each other, to the one area, and free the one or more other areas.

摘要翻译： 一种具有多个虚拟计算机的虚拟计算机系统，所述虚拟计算机系统包括：区域分配单元，其可操作用于当虚拟计算机尝试对分配给所述多个虚拟计算机并共享的基本区域进行写入时， 从基本区域到复制基本区域的复制区域和执行写入到虚拟计算机的分配; 以及区域释放单元，其可操作用于当所述基本区域的内容与至少一个复制区域的内容匹配时，将已经被分配了一个或多个其他区域的一个或多个虚拟计算机的区域分配改变为 内容相互匹配的区域到一个区域，并释放一个或多个其他区域。

公开(公告)号：US20120179924A1

公开(公告)日：2012-07-12

申请号：US13395985

申请日：2011-06-07

申请人： Masashi Sugiyama ,  Masahiko Saito

发明人： Masashi Sugiyama ,  Masahiko Saito

IPC分类号： G06F1/32 ,  G06F9/38

CPC分类号： G06F1/32 ,  G06F1/3206

摘要： An integrated circuit provided with a processor includes a loop detection unit that detects execution of a loop in the processor, a loop-carried dependence analysis unit that analyzes the loop in order to detect loop-carried dependence, and a power control unit that performs power saving control when no loop-carried dependence is detected. By detecting whether a loop has loop-carried dependence, loops for calculation or the like can be excluded from power saving control. As a result, a larger variety of busy-waits can be detected, and the amount of power wasted by a busy-wait can be reduced.

摘要翻译： 设置有处理器的集成电路包括：环路检测单元，其检测处理器中的环路的执行;循环承载依赖性分析单元，其对所述环路进行分析以检测环路依赖性;以及功率控制单元，其执行功率 当没有检测到环路携带依赖时，节省控制。 通过检测循环是否具有循环承载依赖性，可以从功率节省控制中排除用于计算的循环等。 结果，可以检测到更多种类的忙等待，并且可以减少由忙等待浪费的功率量。