公开(公告)号：US20170207077A1

公开(公告)日：2017-07-20

申请号：US15403455

申请日：2017-01-11

Applicant: Mattson Technology, Inc.

Inventor： Vladimir Nagorny ,  Shawming Ma ,  Vijay M. Vaniapura ,  Ryan M. Pakulski

IPC: H01L21/02 ,  H01L21/027 ,  B08B7/00 ,  H01J37/32

CPC classification number: H01L21/0206 ,  B08B7/0035 ,  H01J37/32009 ,  H01J37/32357 ,  H01J37/32449 ,  H01J37/32651 ,  H01J2237/334 ,  H01L21/0273

Abstract: Systems, methods, and apparatus for processing a substrate in a plasma processing apparatus using a variable pattern separation grid are provided. In one example implementation, a plasma processing apparatus can have a plasma chamber and a processing chamber separated from the plasma chamber. The apparatus can further include a variable pattern separation grid separating the plasma chamber and the processing chamber. The variable pattern separation grid can include a plurality grid plates. Each grid plate can have a grid pattern with one or more holes. At least one of the plurality of grid plates is movable relative to the other grid plates in the plurality of grid plates such that the variable pattern separation grid can provide a plurality of different composite grid patterns.

公开(公告)号：US10078266B2

公开(公告)日：2018-09-18

申请号：US15441332

申请日：2017-02-24

Applicant: Mattson Technology, Inc.

Inventor： Wei-Hua Liou ,  Chun-Yen Kang ,  Vijay M. Vaniapura ,  Hai-Au M. Phan-Vu ,  Shawming Ma

IPC: G03F7/42 ,  H01L21/66 ,  H01L21/311

CPC classification number: G03F7/42 ,  G03F7/423 ,  G03F7/427 ,  H01J2237/3342 ,  H01L21/31133 ,  H01L21/31138 ,  H01L22/24

Abstract: Processes for removing a photoresist from a substrate after, for instance, ion implantation are provided. In one example implementation, a process can include placing a substrate having a bulk photoresist and a crust formed on the bulk photoresist in a processing chamber. The process can include initiating a first strip process in the processing chamber. The process can include accessing an optical emission signal associated with a plasma during the first strip process. The process can include identifying an endpoint for the first strip process based at least in part on the optical emission signal. The process can include terminating the first strip process based at least in part on the endpoint. The process can include initiating a second strip process to remove the photoresist from the substrate.

公开(公告)号：US10599039B2

公开(公告)日：2020-03-24

申请号：US15597283

申请日：2017-05-17

Applicant: Mattson Technology, Inc. ,  Beijing E-Town Semiconductor Technology, Co., LTD

Inventor： Vijay M. Vaniapura ,  Shawming Ma ,  Li Hou

IPC: G03F7/42 ,  B08B7/00 ,  H01L21/311 ,  H01L21/308 ,  H01L21/3105

Abstract: Processes for removing a mask layer (e.g., doped amorphous carbon mask layer) from a substrate with high aspect ratio structures are provided. In one example implementation, a process can include depositing a polymer layer on at least a portion of a top end of a high aspect ratio structure on a substrate. The process can further include removing at least a portion of the polymer layer and the doped amorphous carbon film form the substrate using a plasma strip process. In example embodiments, depositing a polymer layer can include plugging one or more high aspect ratio structures with the polymer layer. In example embodiments, depositing a polymer layer can include forming a polymer layer on a sidewall of one or more high aspect ratio structures.

公开(公告)号：US20170248849A1

公开(公告)日：2017-08-31

申请号：US15441332

申请日：2017-02-24

Applicant: Mattson Technology, Inc.

Inventor： Wei-Hua Liou ,  Chun-Yen Kang ,  Vijay M. Vaniapura ,  Hai-Au M. Phan-Vu ,  Shawming Ma

IPC: G03F7/42 ,  H01L21/306 ,  H01L21/66 ,  H01L21/3065

CPC classification number: G03F7/42 ,  G03F7/423 ,  G03F7/427 ,  H01J2237/3342 ,  H01L21/31133 ,  H01L21/31138 ,  H01L22/24

Abstract: Processes for removing a photoresist from a substrate after, for instance, ion implantation are provided. In one example implementation, a process can include placing a substrate having a bulk photoresist and a crust formed on the bulk photoresist in a processing chamber. The process can include initiating a first strip process in the processing chamber. The process can include accessing an optical emission signal associated with a plasma during the first strip process. The process can include identifying an endpoint for the first strip process based at least in part on the optical emission signal. The process can include terminating the first strip process based at least in part on the endpoint. The process can include initiating a second strip process to remove the photoresist from the substrate.

公开(公告)号：US11094528B2

公开(公告)日：2021-08-17

申请号：US16282909

申请日：2019-02-22

Applicant: Beijing E-Town Semiconductor Technology Co., Ltd. ,  Mattson Technology, Inc.

Inventor： Tongchuan Gao ,  Grigoriy Kishko ,  Vijay M. Vaniapura ,  Michael X. Yang

IPC: H01L21/02 ,  H01L21/56 ,  H01L23/31 ,  G03F7/42 ,  B08B5/00 ,  H01L29/10 ,  H01L29/165 ,  H01L29/78

Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece in a processing chamber. The processing chamber can be separated from a plasma chamber by a separation grid assembly. The method can include forming a passivation layer on the workpiece in the processing chamber using radicals generated in a first plasma in the plasma chamber. The method can include performing a surface treatment process on the workpiece in the processing chamber using a second plasma generated in the plasma chamber.

公开(公告)号：US20200218158A1

公开(公告)日：2020-07-09

申请号：US16822747

申请日：2020-03-18

Applicant: Mattson Technology, Inc. ,  Beijing E-Town Semiconductor Technology, Co., LTD

Inventor： Vijay M. Vaniapura ,  Shawming Ma ,  Li Hou

IPC: G03F7/42 ,  B08B7/00 ,  H01L21/311 ,  H01L21/308 ,  H01L21/3105

Abstract: Processes for removing a mask layer (e.g., doped amorphous carbon mask layer) from a substrate with high aspect ratio structures are provided. In one example implementation, a process can include depositing a polymer layer on at least a portion of a top end of a high aspect ratio structure on a substrate. The process can further include removing at least a portion of the polymer layer and the doped amorphous carbon film form the substrate using a plasma strip process. In example embodiments, depositing a polymer layer can include plugging one or more high aspect ratio structures with the polymer layer. In example embodiments, depositing a polymer layer can include forming a polymer layer on a sidewall of one or more high aspect ratio structures.

公开(公告)号：US10217626B1

公开(公告)日：2019-02-26

申请号：US15843043

申请日：2017-12-15

Applicant: Mattson Technology, Inc.

Inventor： Tongchuan Gao ,  Grigoriy Kishko ,  Vijay M. Vaniapura ,  Michael X. Yang

IPC: H01L21/02 ,  H01L21/56 ,  H01L23/31 ,  G03F7/42 ,  B08B5/00 ,  H01L29/10 ,  H01L29/165 ,  H01L29/78

Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece in a processing chamber. The processing chamber can be separated from a plasma chamber by a separation grid assembly. The method can include forming a passivation layer on the workpiece in the processing chamber using radicals generated in a first plasma in the plasma chamber. The method can include performing a surface treatment process on the workpiece in the processing chamber using a second plasma generated in the plasma chamber.

公开(公告)号：US10901321B2

公开(公告)日：2021-01-26

申请号：US16822747

申请日：2020-03-18

Applicant: Mattson Technology, Inc. ,  Beijing E-Town Semiconductor Technology, Co., LTD

Inventor： Vijay M. Vaniapura ,  Shawming Ma ,  Li Hou

IPC: G03F7/42 ,  B08B7/00 ,  H01L21/311 ,  H01L21/308 ,  H01L21/3105

Abstract: Processes for removing a mask layer (e.g., doped amorphous carbon mask layer) from a substrate with high aspect ratio structures are provided. In one example implementation, a process can include depositing a polymer layer on at least a portion of a top end of a high aspect ratio structure on a substrate. The process can further include removing at least a portion of the polymer layer and the doped amorphous carbon film form the substrate using a plasma strip process. In example embodiments, depositing a polymer layer can include plugging one or more high aspect ratio structures with the polymer layer. In example embodiments, depositing a polymer layer can include forming a polymer layer on a sidewall of one or more high aspect ratio structures.

公开(公告)号：US20190189420A1

公开(公告)日：2019-06-20

申请号：US16282909

申请日：2019-02-22

Applicant: Mattson Technology, Inc.

Inventor： Tongchuan Gao ,  Grigoriy Kishko ,  Vijay M. Vaniapura ,  Michael X. Yang

IPC: H01L21/02 ,  B08B5/00 ,  G03F7/42 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L21/0206 ,  B08B5/00 ,  G03F7/427 ,  H01L21/56 ,  H01L23/3171 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/7851

Abstract: Processes and apparatuses for the treatment of semiconductor workpieces are provided. In some embodiments, a method can include placing the workpiece in a processing chamber. The processing chamber can be separated from a plasma chamber by a separation grid assembly. The method can include forming a passivation layer on the workpiece in the processing chamber using radicals generated in a first plasma in the plasma chamber. The method can include performing a surface treatment process on the workpiece in the processing chamber using a second plasma generated in the plasma chamber.

公开(公告)号：US20180074409A1

公开(公告)日：2018-03-15

申请号：US15597283

申请日：2017-05-17

Applicant: Mattson Technology, Inc.

Inventor： Vijay M. Vaniapura ,  Shawming Ma ,  Li Hou

IPC: G03F7/42 ,  H01L21/308 ,  H01L21/3105 ,  B08B7/00

Abstract: Processes for removing a mask layer (e.g., doped amorphous carbon mask layer) from a substrate with high aspect ratio structures are provided. In one example implementation, a process can include depositing a polymer layer on at least a portion of a top end of a high aspect ratio structure on a substrate. The process can further include removing at least a portion of the polymer layer and the doped amorphous carbon film form the substrate using a plasma strip process. In example embodiments, depositing a polymer layer can include plugging one or more high aspect ratio structures with the polymer layer. In example embodiments, depositing a polymer layer can include forming a polymer layer on a sidewall of one or more high aspect ratio structures.