公开(公告)号：US20140131859A1

公开(公告)日：2014-05-15

申请号：US13929978

申请日：2013-06-28

申请人： Maxim Integrated Products, Inc.

发明人： Yong Li Xu ,  Tiao Zhou ,  Xiansong Chen ,  Kaysar M. Rahim ,  Viren Khandekar ,  Yi-Sheng Anthony Sun ,  Arkadii V. Samoilov

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/02165 ,  H01L2224/02185 ,  H01L2224/0219 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05563 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/0569 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/10125 ,  H01L2224/13013 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/1416 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/26125 ,  H01L2224/29013 ,  H01L2224/32227 ,  H01L2224/3303 ,  H01L2224/33051 ,  H01L2224/3316 ,  H01L2224/81192 ,  H01L2224/81365 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83365 ,  H01L2224/83815 ,  H01L2924/351 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2924/00

摘要： A wafer level package includes a wafer, a lead disposed of the wafer for connecting the wafer to an electrical circuit, and a core disposed of the lead. In some embodiments, the lead disposed of the wafer is a copper pillar, and the core is plated onto the copper pillar. In some embodiments, the core is polymer screen-plated onto the lead. In some embodiments, the core extends between at least approximately thirty-five micrometers (35 μm) and fifty micrometers (50 μm) from the lead. In some embodiments, the core covers between at least approximately one-third (⅓) and one-half (½) of the surface area of the lead. In some embodiments, the core comprises a stud-shape extending from the lead. In some embodiments, the core extends perpendicularly across the lead. In some embodiments, the core extends longitudinally along the lead. Further, a portion of the core can extend perpendicularly from a longitudinal core.

摘要翻译： 晶片级封装包括晶片，用于将晶片连接到电路的晶片设置的引线和设置在引线上的芯。 在一些实施例中，设置晶片的引线是铜柱，并且芯被镀在铜柱上。 在一些实施方案中，芯是聚合物丝网电镀到引线上。 在一些实施例中，芯从引线延伸至少约35微米（35微米）和50微米（50μm）。 在一些实施例中，芯覆盖在铅的表面积的至少约三分之一（1/3）和一半（1/2）之间。 在一些实施例中，芯包括从引线延伸的螺柱形状。 在一些实施例中，芯垂直延伸穿过导线。 在一些实施例中，芯沿着引线纵向延伸。 此外，芯的一部分可以从纵向芯垂直延伸。

公开(公告)号：US10727086B2

公开(公告)日：2020-07-28

申请号：US16281579

申请日：2019-02-21

申请人： Maxim Integrated Products, Inc.

发明人： Saurabh Nilkanth Athavale ,  Yi-Sheng Anthony Sun ,  Zhiyong Wang ,  Tie Wang

IPC分类号： H01L23/48 ,  H01L29/40 ,  H01L21/56 ,  H01L25/16 ,  H01L31/18 ,  H01L31/0203 ,  H01L31/02 ,  H01L23/00

摘要： An optical sensor packaging system and method can include: providing an embedded substrate, the embedded substrate including an embedded chip coupled to a redistribution pad with a redistribution line connecting therebetween; mounting an optical sensor to the embedded substrate, the optical sensor including a photo sensitive material formed on a photo sensitive area of an active optical side of the optical sensor; wire-bonding the optical sensor to the embedded substrate with a first bond wire connected from the active optical side to the redistribution pad; and encapsulating the optical sensor, the first bond wire, and the photo sensitive material with an over-mold, the over-mold formed with a top surface co-planar to a surface of the photo sensitive material, the over-mold forming a vertically extended boarder around the photo sensitive material and around the optical sensing area, and the over-mold formed above the first bond wire.

公开(公告)号：US20190295858A1

公开(公告)日：2019-09-26

申请号：US16281579

申请日：2019-02-21

申请人： Maxim Integrated Products, Inc.

发明人： Saurabh Nilkanth Athavale ,  Yi-Sheng Anthony Sun ,  Zhiyong Wang ,  Tie Wang

IPC分类号： H01L21/56 ,  H01L25/16 ,  H01L23/00 ,  H01L31/0203 ,  H01L31/02 ,  H01L31/18

摘要： An optical sensor packaging system and method can include: providing an embedded substrate, the embedded substrate including an embedded chip coupled to a redistribution pad with a redistribution line connecting therebetween; mounting an optical sensor to the embedded substrate, the optical sensor including a photo sensitive material formed on a photo sensitive area of an active optical side of the optical sensor; wire-bonding the optical sensor to the embedded substrate with a first bond wire connected from the active optical side to the redistribution pad; and encapsulating the optical sensor, the first bond wire, and the photo sensitive material with an over-mold, the over-mold formed with a top surface co-planar to a surface of the photo sensitive material, the over-mold forming a vertically extended boarder around the photo sensitive material and around the optical sensing area, and the over-mold formed above the first bond wire.

公开(公告)号：US11380558B2

公开(公告)日：2022-07-05

申请号：US16908596

申请日：2020-06-22

申请人： Maxim Integrated Products, Inc.

发明人： Saurabh Nilkanth Athavale ,  Yi-Sheng Anthony Sun ,  Zhiyong Wang ,  Tie Wang

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L21/56 ,  H01L25/16 ,  H01L31/18 ,  H01L31/0203 ,  H01L31/02 ,  H01L23/00

摘要： An optical sensor packaging system and method can include: providing a substrate, the substrate including a redistribution pad; mounting an optical sensor to the substrate, the optical sensor including a photo sensitive material formed on a photo sensitive area of an active optical side of the optical sensor; wire-bonding the optical sensor to the substrate with a first bond wire connected from the active optical side to the redistribution pad; and encapsulating the optical sensor, the first bond wire, and the photo sensitive material with an over-mold, the over-mold formed with a top surface co-planar to a surface of the photo sensitive material, the over-mold forming a vertically extended border around the photo sensitive material and around the photo sensitive area, and the over-mold formed above the first bond wire.

公开(公告)号：US20200335359A1

公开(公告)日：2020-10-22

申请号：US16908596

申请日：2020-06-22

申请人： Maxim Integrated Products, Inc.

发明人： Saurabh Nilkanth Athavale ,  Yi-Sheng Anthony Sun ,  Zhiyong Wang ,  Tie Wang

IPC分类号： H01L21/56 ,  H01L25/16 ,  H01L31/18 ,  H01L31/0203 ,  H01L31/02 ,  H01L23/00

摘要： An optical sensor packaging system and method can include: providing a substrate, the substrate including a redistribution pad; mounting an optical sensor to the substrate, the optical sensor including a photo sensitive material formed on a photo sensitive area of an active optical side of the optical sensor; wire-bonding the optical sensor to the substrate with a first bond wire connected from the active optical side to the redistribution pad; and encapsulating the optical sensor, the first bond wire, and the photo sensitive material with an over-mold, the over-mold formed with a top surface co-planar to a surface of the photo sensitive material, the over-mold forming a vertically extended border around the photo sensitive material and around the photo sensitive area, and the over-mold formed above the first bond wire.

公开(公告)号：US09583425B2

公开(公告)日：2017-02-28

申请号：US13929978

申请日：2013-06-28

申请人： Maxim Integrated Products, Inc.

发明人： Yong Li Xu ,  Tiao Zhou ,  Xiansong Chen ,  Kaysar M. Rahim ,  Viren Khandekar ,  Yi-Sheng Anthony Sun ,  Arkadii V. Samoilov

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L21/768

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/02165 ,  H01L2224/02185 ,  H01L2224/0219 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05563 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/0569 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/10125 ,  H01L2224/13013 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/1416 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/26125 ,  H01L2224/29013 ,  H01L2224/32227 ,  H01L2224/3303 ,  H01L2224/33051 ,  H01L2224/3316 ,  H01L2224/81192 ,  H01L2224/81365 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83365 ,  H01L2224/83815 ,  H01L2924/351 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2924/00

摘要： A wafer level package includes a wafer, a lead disposed of the wafer for connecting the wafer to an electrical circuit, and a core disposed of the lead. In some embodiments, the lead disposed of the wafer is a copper pillar, and the core is plated onto the copper pillar. In some embodiments, the core is polymer screen-plated onto the lead. In some embodiments, the core extends between at least approximately thirty-five micrometers (35 μm) and fifty micrometers (50 μm) from the lead. In some embodiments, the core covers between at least approximately one-third (⅓) and one-half (½) of the surface area of the lead. In some embodiments, the core comprises a stud-shape extending from the lead. In some embodiments, the core extends perpendicularly across the lead. In some embodiments, the core extends longitudinally along the lead. Further, a portion of the core can extend perpendicularly from a longitudinal core.

摘要翻译： 晶片级封装包括晶片，用于将晶片连接到电路的晶片设置的引线和设置在引线上的芯。 在一些实施例中，设置晶片的引线是铜柱，并且芯被镀在铜柱上。 在一些实施方案中，芯是聚合物丝网电镀到引线上。 在一些实施例中，芯从引线延伸至少约35微米（35微米）和50微米（50μm）。 在一些实施例中，芯覆盖在铅的表面积的至少约三分之一（1/3）和一半（1/2）之间。 在一些实施例中，芯包括从引线延伸的螺柱形状。 在一些实施例中，芯垂直延伸穿过导线。 在一些实施例中，芯沿着引线纵向延伸。 此外，芯的一部分可以从纵向芯垂直延伸。