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    Three-dimensional integrated CMOS-MEMS device and process for making the same
    5.
    发明授权
    Three-dimensional integrated CMOS-MEMS device and process for making the same 有权
    三维集成CMOS-MEMS器件及其制造方法

    公开(公告)号：US07071031B2

    公开(公告)日：2006-07-04

    申请号：US10446461

    申请日：2003-05-28

    申请人： H. Bernhard Pogge ,  Michel Despont ,  Ute Drechsler ,  Peter Vettiger ,  Roy Yu

    发明人： H. Bernhard Pogge ,  Michel Despont ,  Ute Drechsler ,  Peter Vettiger ,  Roy Yu

    IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

    CPC分类号： B81C1/00238 ,  B81B2203/0307 ,  H01L21/76898 ,  H01L2224/16225

    摘要： A vertically integrated structure includes a micro-electromechanical system (MEMS) and a chip for delivering signals to the MEMS. The structure includes a metal stud connecting a surface of the chip and the MEMS; the MEMS has an anchor portion having a conducting pad on an underside thereof contacting the metal stud. The MEMS is spaced from the chip by a distance corresponding to a height of the metal stud, and the MEMS includes a doped region in contact with the conducting pad. In particular, the MEMS may include a cantilever structure, with the end portion including a tip extending in the vertical direction. A support structure (e.g. of polyimide) may surround the metal stud and contact both the underside of the MEMS and the surface of the chip. A temporary carrier plate is used to facilitate handling of the MEMS and alignment to the chip.

    摘要翻译： 垂直集成的结构包括微机电系统（MEMS）和用于将信号传递到MEMS的芯片。 该结构包括连接芯片表面和MEMS的金属螺柱; MEMS具有在其下侧具有接触金属螺柱的导电垫的锚固部分。 MEMS与芯片间隔一定距离对应于金属螺柱的高度，并且MEMS包括与导电焊盘接触的掺杂区域。 特别地，MEMS可以包括悬臂结构，其中端部包括在垂直方向上延伸的尖端。 支撑结构（例如聚酰亚胺）可以围绕金属螺柱并且接触MEMS的下侧和芯片的表面。 使用临时载体板来促进MEMS的处理和与芯片的对准。

    Three-dimensional integrated CMOS-MEMS device and process for making the same
    6.
    发明授权
    Three-dimensional integrated CMOS-MEMS device and process for making the same 有权
    三维集成CMOS-MEMS器件及其制造方法

    公开(公告)号：US06835589B2

    公开(公告)日：2004-12-28

    申请号：US10294140

    申请日：2002-11-14

    申请人： H. Bernhard Pogge ,  Michel Despont ,  Ute Drechsler ,  Chandrika Prasad ,  Peter Vettiger ,  Roy Yu

    发明人： H. Bernhard Pogge ,  Michel Despont ,  Ute Drechsler ,  Chandrika Prasad ,  Peter Vettiger ,  Roy Yu

    IPC分类号： H01L2100

    CPC分类号： B81C1/00238 ,  B81B2203/0307 ,  H01L21/76898 ,  H01L2224/16225

    摘要： A vertically integrated structure includes a micro-electromechanical system (MEMS) and a chip for delivering signals to the MEMS. The MEMS has an anchor portion having a conductor therethrough, by which it is connected to a substrate. The chip is attached to the MEMS substrate in a direction normal to the substrate surface, so as to make a conductive path from the chip to the MEMS. The chip may be attached by bonding the conductor to C4 metal pads formed on the chip, or by bonding the conductor to metal studs on the chip. The MEMS substrate may be thinned before attachment to the chip, or may be removed from the underside of the MEMS. A temporary carrier plate is used to facilitate handling of the MEMS and alignment to the chip.

    摘要翻译： 垂直集成的结构包括微机电系统（MEMS）和用于将信号传递到MEMS的芯片。 MEMS具有一个具有穿过其中的导体的锚固部分，通过它连接到基底。 芯片沿垂直于衬底表面的方向连接到MEMS衬底上，从而形成从芯片到MEMS的导电路径。 可以通过将导体连接到形成在芯片上的C4金属焊盘，或者通过将导体连接到芯片上的金属螺柱来附接芯片。 在附接到芯片之前MEMS基板可以被薄化，或者可以从MEMS的下侧去除。 使用临时载体板来促进MEMS的处理和与芯片的对准。

    Platinum silicide tip apices for probe-based technologies
    8.
    发明授权
    Platinum silicide tip apices for probe-based technologies 有权
    用于探针技术的铂硅化物尖端顶点

    公开(公告)号：US08332961B2

    公开(公告)日：2012-12-11

    申请号：US12234816

    申请日：2008-09-22

    申请人： Harish Bhaskaran ,  Michel Despont ,  Ute Drechsler ,  Abu Sebastian

    发明人： Harish Bhaskaran ,  Michel Despont ,  Ute Drechsler ,  Abu Sebastian

    IPC分类号： G01Q60/40 ,  G01Q10/00

    CPC分类号： G01Q60/40

    摘要： Tips including a platinum silicide at an apex of a single crystal silicon tip are provided herein. Also, techniques for creating a tip are provided. The techniques include depositing an amount of platinum (Pt) on a single crystal silicon tip, annealing the platinum and single crystal silicon tip to form a platinum silicide, and selectively etching the platinum with respect to the formed platinum silicide.

    摘要翻译： 本文提供了包括单晶硅尖端顶点处的铂硅化物的提示。 此外，提供了用于创建提示的技术。 这些技术包括在单晶硅尖端上沉积一定量的铂（Pt），使铂和单晶硅尖端退火以形成铂硅化物，并相对于形成的铂硅化物选择性地蚀刻铂。

    Method for producing an integrated device
    9.
    发明授权
    Method for producing an integrated device 有权
    集成装置的制造方法

    公开(公告)号：US08201325B2

    公开(公告)日：2012-06-19

    申请号：US12275276

    申请日：2008-11-21

    申请人： Laurent A. Dellmann ,  Michel Despont ,  Ute Drechsler ,  Roland M. Guerre

    发明人： Laurent A. Dellmann ,  Michel Despont ,  Ute Drechsler ,  Roland M. Guerre

    IPC分类号： H05K3/30

    CPC分类号： B81C1/00373 ,  B81C3/008 ,  B81C2201/0185 ,  H01L24/95 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/5313

    摘要： A method for producing an integrated device. A source substrate is provided, the source substrate carrying one or more components to be attached to a receiver surface having a uneven topography. The source substrate includes a deformable layer on a surface on which the one or more components are carried. The source substrate is aligned such that said one or more components carried thereon are associated with contact areas of the receiver surface. The source substrate and the receiver surface are moved towards each other such that the one or more components are brought into contact with the contact areas wherein the deformable layer is at least partially deformed. The source substrate is removed such that the one or more of the components remain located on the contact areas of the receiver surface.

    摘要翻译： 一种集成装置的制造方法。 提供源极衬底，源极衬底承载要附着到具有不平坦的形貌的接收器表面的一个或多个部件。 源极基板在其上承载有一个或多个部件的表面上包括可变形层。 源极衬底被对准，使得其上承载的所述一个或多个部件与接收器表面的接触区域相关联。 源极基板和接收器表面朝向彼此移动，使得一个或多个部件与可变形层至少部分变形的接触区域接触。 去除源极衬底，使得一个或多个部件保持位于接收器表面的接触区域上。

    PLATINUM SILICIDE TIP APICES FOR PROBE-BASED TECHNOLOGIES
    10.
    发明申请
    PLATINUM SILICIDE TIP APICES FOR PROBE-BASED TECHNOLOGIES 有权
    用于基于探针的技术的二氧化钛硅胶贴片APICES

    公开(公告)号：US20100077516A1

    公开(公告)日：2010-03-25

    申请号：US12234816

    申请日：2008-09-22

    申请人： Harish Bhaskaran ,  Michel Despont ,  Ute Drechsler ,  Abu Sebastian

    发明人： Harish Bhaskaran ,  Michel Despont ,  Ute Drechsler ,  Abu Sebastian

    IPC分类号： G01N13/16

    CPC分类号： G01Q60/40

    摘要： Tips including a platinum silicide at an apex of a single crystal silicon tip are provided herein. Also, techniques for creating a tip are provided. The techniques include depositing an amount of platinum (Pt) on a single crystal silicon tip, annealing the platinum and single crystal silicon tip to form a platinum silicide, and selectively etching the platinum with respect to the formed platinum silicide.

    摘要翻译： 本文提供了包括单晶硅尖端顶点处的铂硅化物的提示。 此外，提供了用于创建提示的技术。 这些技术包括在单晶硅尖端上沉积一定量的铂（Pt），使铂和单晶硅尖端退火以形成铂硅化物，并相对于形成的铂硅化物选择性地蚀刻铂。