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    Three-dimensional integrated CMOS-MEMS device and process for making the same
    1.
    发明授权
    Three-dimensional integrated CMOS-MEMS device and process for making the same 有权
    三维集成CMOS-MEMS器件及其制造方法

    公开(公告)号：US07071031B2

    公开(公告)日：2006-07-04

    申请号：US10446461

    申请日：2003-05-28

    申请人： H. Bernhard Pogge ,  Michel Despont ,  Ute Drechsler ,  Peter Vettiger ,  Roy Yu

    发明人： H. Bernhard Pogge ,  Michel Despont ,  Ute Drechsler ,  Peter Vettiger ,  Roy Yu

    IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

    CPC分类号： B81C1/00238 ,  B81B2203/0307 ,  H01L21/76898 ,  H01L2224/16225

    摘要： A vertically integrated structure includes a micro-electromechanical system (MEMS) and a chip for delivering signals to the MEMS. The structure includes a metal stud connecting a surface of the chip and the MEMS; the MEMS has an anchor portion having a conducting pad on an underside thereof contacting the metal stud. The MEMS is spaced from the chip by a distance corresponding to a height of the metal stud, and the MEMS includes a doped region in contact with the conducting pad. In particular, the MEMS may include a cantilever structure, with the end portion including a tip extending in the vertical direction. A support structure (e.g. of polyimide) may surround the metal stud and contact both the underside of the MEMS and the surface of the chip. A temporary carrier plate is used to facilitate handling of the MEMS and alignment to the chip.

    摘要翻译： 垂直集成的结构包括微机电系统（MEMS）和用于将信号传递到MEMS的芯片。 该结构包括连接芯片表面和MEMS的金属螺柱; MEMS具有在其下侧具有接触金属螺柱的导电垫的锚固部分。 MEMS与芯片间隔一定距离对应于金属螺柱的高度，并且MEMS包括与导电焊盘接触的掺杂区域。 特别地，MEMS可以包括悬臂结构，其中端部包括在垂直方向上延伸的尖端。 支撑结构（例如聚酰亚胺）可以围绕金属螺柱并且接触MEMS的下侧和芯片的表面。 使用临时载体板来促进MEMS的处理和与芯片的对准。

    Three-dimensional integrated CMOS-MEMS device and process for making the same
    2.
    发明授权
    Three-dimensional integrated CMOS-MEMS device and process for making the same 有权
    三维集成CMOS-MEMS器件及其制造方法

    公开(公告)号：US06835589B2

    公开(公告)日：2004-12-28

    申请号：US10294140

    申请日：2002-11-14

    申请人： H. Bernhard Pogge ,  Michel Despont ,  Ute Drechsler ,  Chandrika Prasad ,  Peter Vettiger ,  Roy Yu

    发明人： H. Bernhard Pogge ,  Michel Despont ,  Ute Drechsler ,  Chandrika Prasad ,  Peter Vettiger ,  Roy Yu

    IPC分类号： H01L2100

    CPC分类号： B81C1/00238 ,  B81B2203/0307 ,  H01L21/76898 ,  H01L2224/16225

    摘要： A vertically integrated structure includes a micro-electromechanical system (MEMS) and a chip for delivering signals to the MEMS. The MEMS has an anchor portion having a conductor therethrough, by which it is connected to a substrate. The chip is attached to the MEMS substrate in a direction normal to the substrate surface, so as to make a conductive path from the chip to the MEMS. The chip may be attached by bonding the conductor to C4 metal pads formed on the chip, or by bonding the conductor to metal studs on the chip. The MEMS substrate may be thinned before attachment to the chip, or may be removed from the underside of the MEMS. A temporary carrier plate is used to facilitate handling of the MEMS and alignment to the chip.

    摘要翻译： 垂直集成的结构包括微机电系统（MEMS）和用于将信号传递到MEMS的芯片。 MEMS具有一个具有穿过其中的导体的锚固部分，通过它连接到基底。 芯片沿垂直于衬底表面的方向连接到MEMS衬底上，从而形成从芯片到MEMS的导电路径。 可以通过将导体连接到形成在芯片上的C4金属焊盘，或者通过将导体连接到芯片上的金属螺柱来附接芯片。 在附接到芯片之前MEMS基板可以被薄化，或者可以从MEMS的下侧去除。 使用临时载体板来促进MEMS的处理和与芯片的对准。

    Process for making fine pitch connections between devices and structure made by the process
    5.
    发明授权
    Process for making fine pitch connections between devices and structure made by the process 有权
    用于在设备和由该过程制造的结构之间进行细间距连接的过程

    公开(公告)号：US06737297B2

    公开(公告)日：2004-05-18

    申请号：US10213872

    申请日：2002-08-06

    申请人： H. Bernhard Pogge ,  Chandrika Prasad ,  Roy Yu

    发明人： H. Bernhard Pogge ,  Chandrika Prasad ,  Roy Yu

    IPC分类号： H01L2144

    CPC分类号： H01L21/6835 ,  H01L23/5389 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/19041 ,  H01L2224/0401

    摘要： A semiconductor device structure including fine-pitch connections between chips is fabricated using stud/via matching structures. The stud and via are aligned and connected, thereby permitting fine-pitch chip placement and electrical interconnections. A chip support is then attached to the device. A temporary chip alignment structure includes a transparent plate exposed to ablating radiation; the plate is then detached and removed. This method permits interconnection of multiple chips (generally with different sizes, architectures and functions) at close proximity and with very high wiring density. The device may include passive components located on separate chips, so that the device includes chips with and without active devices.

    摘要翻译： 使用螺柱/通孔匹配结构制造包括芯片之间的细间距连接的半导体器件结构。 螺柱和通孔对准和连接，从而允许细间距芯片放置和电互连。 然后将芯片支撑件附接到该装置。 临时芯片对准结构包括暴露于消融辐射的透明板; 然后将板拆下并取出。 该方法允许在紧密接近且具有非常高的布线密度的情况下互连多个芯片（通常具有不同尺寸，架构和功能）。 该设备可以包括位于分离的芯片上的无源组件，使得该设备包括具有和不具有有源设备的芯片。

    Process for making fine pitch connections between devices and structure made by the process
    8.
    发明授权
    Process for making fine pitch connections between devices and structure made by the process 有权
    用于在设备和由该过程制造的结构之间进行细间距连接的过程

    公开(公告)号：US06444560B1

    公开(公告)日：2002-09-03

    申请号：US09669531

    申请日：2000-09-26

    申请人： H. Bernhard Pogge ,  Chandrika Prasad ,  Roy Yu

    发明人： H. Bernhard Pogge ,  Chandrika Prasad ,  Roy Yu

    IPC分类号： H01L2144

    CPC分类号： H01L21/6835 ,  H01L23/5389 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/19041 ,  H01L2224/0401

    摘要： A semiconductor device structure including fine-pitch connections between chips is fabricated using stud/via matching structures. A stud is provided on the front surface of the chip, and a layer with interconnection wiring is formed on a transparent plate. The wiring layer includes a conducting pad on a surface thereof opposite the plate. A second layer is formed on top of the wiring layer, with a via formed therein to expose the conducting pad. The stud and via are then aligned and connected; the front surface of the chip thus contacts the second layer and the stud makes electrical contact with the conducting pad. A chip support is then attached to the device. An interface between the wiring layer and the plate is exposed to ablating radiation; the plate is then detached and removed. This method permits interconnection of multiple chips (generally with different sizes, architectures and functions) at close proximity and with very high wiring density.

    摘要翻译： 使用螺柱/通孔匹配结构制造包括芯片之间的细间距连接的半导体器件结构。 在芯片的前表面上设置螺柱，并且在透明板上形成具有互连布线的层。 布线层包括与板相对的表面上的导电垫。 第二层形成在布线层的顶部，其中形成有通孔以露出导电垫。 柱和通孔然后对齐并连接; 因此，芯片的前表面接触第二层，螺柱与导电垫电接触。 然后将芯片支撑件附接到该装置。 布线层和板之间的界面暴露于消融辐射; 然后将板拆下并取出。 该方法允许在紧密接近且具有非常高的布线密度的情况下互连多个芯片（通常具有不同尺寸，架构和功能）。