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    Recessed Access Devices And Methods Of Forming A Recessed Access Devices
    2.
    发明申请
    Recessed Access Devices And Methods Of Forming A Recessed Access Devices 有权

    公开(公告)号：US20230062092A1

    公开(公告)日：2023-03-02

    申请号：US17460984

    申请日：2021-08-30

    Applicant: Micron Technology, Inc.

    Inventor： Hyuck Soo Yang ,  Sau Ha Cheung ,  Richard Beeler ,  Ping Chieh Chiang ,  Hyoung Lee ,  Jaydip Guha ,  Soichi Sugiura

    IPC: H01L27/108 ,  H01L29/51

    Abstract: A recessed access device comprises a conductive gate in a trench in semiconductor material. A gate insulator extends along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material. A pair of source/drain regions are in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region in the semiconductor material below the pair of source/drain regions extends along sidewalls and around a bottom of the trench. The gate insulator comprises a low-k material and a high-k material. The low-k material is characterized by its dielectric constant k being no greater than 4.0. The high-k material is both (a) and (b), where: (a): characterized by its dielectric constant k being greater than 4.0; and (b): comprising SixMyO, where “M” is one or more of Al, metal(s) from Group 2, Group 3, Group 4, Group 5, and the lanthanide series of the periodic table; “x” is 0.999 to 0.6; and “y” is 0.001 to 0.4; the SixMyO being above the low-k material. Other embodiments, including method, are disclosed.

    Dielectric Materials, Capacitors and Memory Arrays
    3.
    发明申请
    Dielectric Materials, Capacitors and Memory Arrays 有权

    公开(公告)号：US20220344451A1

    公开(公告)日：2022-10-27

    申请号：US17236865

    申请日：2021-04-21

    Applicant: Micron Technology, Inc.

    Inventor： Richard Beeler ,  Matthew N. Rocklein ,  Timothy A. Quick ,  An-Jen B. Cheng ,  Sumeet C. Pandey

    IPC: H01L49/02 ,  H01L27/108

    Abstract: Some embodiments include dielectric material having a first region containing HfO and having a second region containing ZrO, where the chemical formulas indicate primary constituents rather than specific stoichiometries. The first region contains substantially no Zr, and the second region contains substantially no Hf. Some embodiments include capacitors having a first electrode, a second electrode, and a dielectric material between the first and second electrodes. The dielectric material includes one or more first regions and one or more second regions. The first region(s) contain(s) Hf and substantially no Zr. The second region(s) contain(s) Zr and substantially no Hf. Some embodiments include memory arrays.

    MEMORY DEVICE HAVING CONTROL GATE DIELECTRIC STRUCTURE WITH DIFFERENT DIELECTRIC MATERIALS
    4.
    发明公开
    MEMORY DEVICE HAVING CONTROL GATE DIELECTRIC STRUCTURE WITH DIFFERENT DIELECTRIC MATERIALS 审中-公开

    公开(公告)号：US20230397406A1

    公开(公告)日：2023-12-07

    申请号：US17848107

    申请日：2022-06-23

    Applicant: Micron Technology, Inc

    Inventor： Sau Ha Cheung ,  Soichi Sugiura ,  Jaydip Guha ,  Anthony J. Kanago ,  Richard Beeler

    IPC: H01L27/108

    CPC classification number: H01L27/10823 ,  H01L27/10876

    Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a recess formed in a semiconductor material; a dielectric structure formed in the recess; and a control gate for a transistor of a memory cell, the control gate including a first conductive portion formed in the recess and separated from the semiconductor material by a first portion of the dielectric structure, the first dielectric portion including a first dielectric material between the semiconductor material and the second dielectric material, and a second dielectric material between the first dielectric material and the first conductive portion; and the control gate including the second conductive portion formed over the first conductive portion and separated from the semiconductor material by a second portion of the dielectric structure between the semiconductor material and second conductive portion.

    Recessed Access Devices And Methods Of Forming A Recessed Access Devices
    5.
    发明申请
    Recessed Access Devices And Methods Of Forming A Recessed Access Devices 有权

    公开(公告)号：US20230063549A1

    公开(公告)日：2023-03-02

    申请号：US17411643

    申请日：2021-08-25

    Applicant: Micron Technology, Inc.

    Inventor： Sau Ha Cheung ,  Soichi Sugiura ,  Jaydip Guha ,  Anthony Kanago ,  Richard Beeler

    IPC: H01L29/423 ,  H01L27/108 ,  H01L29/51 ,  H01L29/40

    Abstract: A method of forming a recessed access device comprises forming a trench in semiconductor material. Sidewalls and a bottom of the trench are lined with low-k gate-insulator material. The low-k gate-insulator material is characterized by its dielectric constant k being no greater than 4.0. Sacrificial material is formed in a bottom portion of the trench over the low-k gate-insulator material and over the trench bottom. A high-k gate-insulator material is formed in an upper portion of the trench above the sacrificial material and laterally-inward of the low-k gate-insulator material that is in the upper portion of the trench. The high-k gate-insulator material is characterized by its dielectric constant k being greater than 4.0. The sacrificial material is replaced with a conductive gate that has its top above a bottom of the high-k gate-insulator material. A pair of source/drain regions is formed in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region is in the semiconductor material below the pair of source/drain regions and extends along the trench sidewalls and around the trench bottom. Other embodiments, including structure independent of method, are disclosed.

    Recessed access devices and methods of forming a recessed access devices
    8.
    发明授权
    Recessed access devices and methods of forming a recessed access devices 有权

    公开(公告)号：US11929411B2

    公开(公告)日：2024-03-12

    申请号：US17411643

    申请日：2021-08-25

    Applicant: Micron Technology, Inc.

    Inventor： Sau Ha Cheung ,  Soichi Sugiura ,  Jaydip Guha ,  Anthony Kanago ,  Richard Beeler

    IPC: H01L29/423 ,  H01L29/40 ,  H01L29/51 ,  H10B12/00

    CPC classification number: H01L29/4236 ,  H01L29/401 ,  H01L29/42368 ,  H01L29/512 ,  H10B12/053 ,  H10B12/34

    Abstract: A method of forming a recessed access device comprises forming a trench in semiconductor material. Sidewalls and a bottom of the trench are lined with low-k gate-insulator material. The low-k gate-insulator material is characterized by its dielectric constant k being no greater than 4.0. Sacrificial material is formed in a bottom portion of the trench over the low-k gate-insulator material and over the trench bottom. A high-k gate-insulator material is formed in an upper portion of the trench above the sacrificial material and laterally-inward of the low-k gate-insulator material that is in the upper portion of the trench. The high-k gate-insulator material is characterized by its dielectric constant k being greater than 4.0. The sacrificial material is replaced with a conductive gate that has its top above a bottom of the high-k gate-insulator material. A pair of source/drain regions is formed in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region is in the semiconductor material below the pair of source/drain regions and extends along the trench sidewalls and around the trench bottom. Other embodiments, including structure independent of method, are disclosed.

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