公开(公告)号：US20100253419A1

公开(公告)日：2010-10-07

申请号：US12755119

申请日：2010-04-06

申请人： Mitsuhiro OGAI ,  Hirokazu Yamazaki ,  Keizo Morita ,  Kazuaki Yamane ,  Yasuhiro Fujii ,  Kazuaki Takai ,  Shoichiro Kawashima

发明人： Mitsuhiro OGAI ,  Hirokazu Yamazaki ,  Keizo Morita ,  Kazuaki Yamane ,  Yasuhiro Fujii ,  Kazuaki Takai ,  Shoichiro Kawashima

IPC分类号： G05F3/02

CPC分类号： G11C5/147

摘要： A first transistor has one end and a gate coupled to a first power supply line and other end coupled to a first node. A second transistor has a gate coupled to a second node, one end coupled to the first node, and other end coupled to a third node. A third transistor has one end coupled to a second power supply line, a gate coupled to a fourth node, and other end coupled to the third node. A first bias voltage generation circuit supplies a first bias voltage to the second node. A second bias voltage generation circuit supplies a second bias voltage to the fourth node. Accordingly, the power supply voltage at which the third node is changed from a certain level to another level is set high, and an internal node in a semiconductor device is securely initialized when the power supply voltage is decreased.

摘要翻译： 第一晶体管具有耦合到第一电源线和耦合到第一节点的另一端的一端和栅极。 第二晶体管具有耦合到第二节点的栅极，耦合到第一节点的一端和耦合到第三节点的另一端。 第三晶体管具有耦合到第二电源线的一端，耦合到第四节点的栅极和耦合到第三节点的另一端。 第一偏置电压产生电路向第二节点提供第一偏置电压。 第二偏置电压产生电路向第四节点提供第二偏置电压。 因此，第三节点从一定电平变化到另一电平的电源电压被设定为高电平，并且当电源电压降低时半导体器件中的内部节点被可靠地初始化。

公开(公告)号：US08542041B2

公开(公告)日：2013-09-24

申请号：US12755119

申请日：2010-04-06

申请人： Mitsuhiro Ogai ,  Hirokazu Yamazaki ,  Keizo Morita ,  Kazuaki Yamane ,  Yasuhiro Fujii ,  Kazuaki Takai ,  Shoichiro Kawashima

发明人： Mitsuhiro Ogai ,  Hirokazu Yamazaki ,  Keizo Morita ,  Kazuaki Yamane ,  Yasuhiro Fujii ,  Kazuaki Takai ,  Shoichiro Kawashima

IPC分类号： H03L7/00

CPC分类号： G11C5/147

摘要： A first transistor has one end and a gate coupled to a first power supply line and other end coupled to a first node. A second transistor has a gate coupled to a second node, one end coupled to the first node, and other end coupled to a third node. A third transistor has one end coupled to a second power supply line, a gate coupled to a fourth node, and other end coupled to the third node. A first bias voltage generation circuit supplies a first bias voltage to the second node. A second bias voltage generation circuit supplies a second bias voltage to the fourth node. Accordingly, the power supply voltage at which the third node is changed from a certain level to another level is set high, and an internal node in a semiconductor device is securely initialized when the power supply voltage is decreased.

摘要翻译： 第一晶体管具有耦合到第一电源线和耦合到第一节点的另一端的一端和栅极。 第二晶体管具有耦合到第二节点的栅极，耦合到第一节点的一端和耦合到第三节点的另一端。 第三晶体管具有耦合到第二电源线的一端，耦合到第四节点的栅极和耦合到第三节点的另一端。 第一偏置电压产生电路向第二节点提供第一偏置电压。 第二偏置电压产生电路向第四节点提供第二偏置电压。 因此，第三节点从一定电平变化到另一电平的电源电压被设定为高电平，并且当电源电压降低时半导体器件中的内部节点被可靠地初始化。

公开(公告)号：US20050161717A1

公开(公告)日：2005-07-28

申请号：US11036322

申请日：2005-01-18

申请人： Ko Nakamura ,  Kazuaki Takai

发明人： Ko Nakamura ,  Kazuaki Takai

IPC分类号： H01L21/02 ,  H01L21/314 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/76

CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/56

摘要： After bottom electrode film is formed, a first ferroelectric film is formed thereon. Then, the first ferroelectric film is allowed to crystallize. Thereafter, a second ferroelectric film is formed on the first ferroelectric film. Next, a top electrode film is formed on the second ferroelectric film, and the second ferroelectric film is allowed to crystallize.

摘要翻译： 在形成底电极膜之后，在其上形成第一铁电体膜。 然后，使第一铁电体膜结晶。 此后，在第一铁电体膜上形成第二铁电体膜。 接着，在第二强电介质膜上形成顶部电极膜，使第二强电介质膜结晶化。

公开(公告)号：US06169305A

公开(公告)日：2001-01-02

申请号：US09348474

申请日：1999-07-07

申请人： Kazuaki Takai ,  Kazuaki Kondo

发明人： Kazuaki Takai ,  Kazuaki Kondo

IPC分类号： H01L27108

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

摘要： The semiconductor device comprises an electrode 36 including a first conductive film 30 formed of an oxide film of a first metal, a second conductive film 32 formed on the first conductive film 30 and formed of the first metal, and a third conductive film 34 formed on the second conductive film 32 and containing a second metal different form the first metal. The second conductive film is sandwiched between the first conductive film and the third conductive film, whereby adhesion of the third conductive film can be improved, and the release of the third conductive film can be prevented.

摘要翻译： 半导体器件包括电极36，其包括由第一金属的氧化膜形成的第一导电膜30，形成在第一导电膜30上并由第一金属形成的第二导电膜32和形成在第一导电膜30上的第三导电膜34 第二导电膜32并且包含与第一金属不同的第二金属。 第二导电膜被夹在第一导电膜和第三导电膜之间，从而可以提高第三导电膜的粘附性，并且可以防止第三导电膜的释放。

公开(公告)号：US07247504B2

公开(公告)日：2007-07-24

申请号：US11024873

申请日：2004-12-30

申请人： Osamu Matsuura ,  Kenji Maruyama ,  Kazuaki Takai

发明人： Osamu Matsuura ,  Kenji Maruyama ,  Kazuaki Takai

IPC分类号： H01L21/00

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/56

摘要： A ferroelectric capacitor includes a pair of electrodes, and at least one ferroelectric held between the pair of electrodes, in which the ferroelectric includes a first ferroelectric layer having a surface roughness (RMS) determined with an atomic force microscope of 10 nm or more; and a second ferroelectric layer being arranged adjacent to the first ferroelectric layer and having an RMS of 5 nm or less. A process produces such a ferroelectric capacitor by forming a first ferroelectric layer on or above one of a pair of electrodes at a temperature equal to or higher than a crystallization temperature at which the first ferroelectric layer takes on a ferroelectric crystalline structure, and forming a second ferroelectric layer on the first ferroelectric layer at a temperature lower than a crystallization temperature at which the second ferroelectric layer takes on a ferroelectric crystalline structure.

摘要翻译： 铁电电容器包括一对电极，并且至少一个铁电体保持在该对电极之间，其中铁电体包括由原子力显微镜确定的表面粗糙度（RMS）为10nm以上的第一铁电层; 并且第二铁电层被布置为与第一铁电层相邻并且具有5nm或更小的RMS。 一种工艺通过在等于或高于第一铁电层承受铁电晶体结构的结晶温度的温度下，在一对电极中的一个或其上方形成第一铁电层来制造这种铁电电容器，并且形成第二铁电层 铁电层在第一铁电体层上的温度低于第二铁电层呈铁电晶体结构的结晶温度。

公开(公告)号：US20050242381A1

公开(公告)日：2005-11-03

申请号：US11024873

申请日：2004-12-30

申请人： Osamu Matsuura ,  Kenji Maruyama ,  Kazuaki Takai

发明人： Osamu Matsuura ,  Kenji Maruyama ,  Kazuaki Takai

IPC分类号： C23C14/08 ,  C23C16/40 ,  G01Q30/04 ,  G01Q30/10 ,  G01Q70/04 ,  G01Q70/14 ,  H01L21/02 ,  H01L21/316 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/115 ,  H01L29/76

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/56

摘要： A ferroelectric capacitor includes a pair of electrodes, and at least one ferroelectric held between the pair of electrodes, in which the ferroelectric includes a first ferroelectric layer having a surface roughness (RMS) determined with an atomic force microscope of 10 nm or more; and a second ferroelectric layer being arranged adjacent to the first ferroelectric layer and having an RMS of 5 nm or less. A process produces such a ferroelectric capacitor by forming a first ferroelectric layer on or above one of a pair of electrodes at a temperature equal to or higher than a crystallization temperature at which the first ferroelectric layer takes on a ferroelectric crystalline structure, and forming a second ferroelectric layer on the first ferroelectric layer at a temperature lower than a crystallization temperature at which the second ferroelectric layer takes on a ferroelectric crystalline structure.

公开(公告)号：US06706540B2

公开(公告)日：2004-03-16

申请号：US10361585

申请日：2003-02-11

申请人： Yukinobu Hikosaka ,  Yasutaka Ozaki ,  Kazuaki Takai

发明人： Yukinobu Hikosaka ,  Yasutaka Ozaki ,  Kazuaki Takai

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L27/10811 ,  H01L27/10894 ,  H01L27/11507 ,  H01L28/55

摘要： There is provided a semiconductor device which includes a capacitor including a lower electrode, a dielectric film, and an upper electrode, a first protection film formed on the capacitor, a first wiring formed on the first protection film, a first insulating film formed on the first wiring, a second wiring formed on the first insulating film, a second insulating film formed on the second wiring, and at least one of a second protection film formed between the first insulating film and the first wiring to cover at least the capacitor and a third protection film formed on the second insulating film to cover the capacitor and set to an earth potential. Accordingly, the degradation of the ferroelectric capacitor formed under the multi-layered wiring structure can be suppressed.

摘要翻译： 提供一种半导体器件，其包括具有下电极，电介质膜和上电极的电容器，形成在电容器上的第一保护膜，形成在第一保护膜上的第一布线，形成在第一保护膜上的第一绝缘膜 第一布线，形成在第一绝缘膜上的第二布线，形成在第二布线上的第二绝缘膜，以及形成在第一绝缘膜和第一布线之间的至少一个覆盖至少电容器的第二保护膜，以及 第三保护膜形成在第二绝缘膜上以覆盖电容器并设定为地电位。 因此，可以抑制在多层布线结构下形成的铁电电容器的劣化。

公开(公告)号：US20120171785A1

公开(公告)日：2012-07-05

申请号：US13417811

申请日：2012-03-12

申请人： Tomohiro Takamatsu ,  Junichi Watanabe ,  Ko Nakamura ,  Wensheng Wang ,  Naoyuki Sato ,  Aki Dote ,  Kenji Nomura ,  Yoshimasa Horii ,  Masaki Kurasawa ,  Kazuaki Takai

发明人： Tomohiro Takamatsu ,  Junichi Watanabe ,  Ko Nakamura ,  Wensheng Wang ,  Naoyuki Sato ,  Aki Dote ,  Kenji Nomura ,  Yoshimasa Horii ,  Masaki Kurasawa ,  Kazuaki Takai

IPC分类号： H01L21/02

CPC分类号： H01L28/65 ,  H01L21/31691 ,  H01L28/56

摘要： There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.

摘要翻译： 提供一种形成在粘合剂层上的电容器下电极，其表面粗糙度为0.79nm或更小，并且具有从垂直于衬底上表面的垂直方向倾斜2.3°或更小的（111）取向， 具有（111）取向从基板的垂直方向倾斜3.5°以下的结构的铁电体层和电容器上电极。

公开(公告)号：US07176132B2

公开(公告)日：2007-02-13

申请号：US10695642

申请日：2003-10-29

申请人： Naoya Sashida ,  Katsuyoshi Matsuura ,  Yoshimasa Horii ,  Masaki Kurasawa ,  Kazuaki Takai

发明人： Naoya Sashida ,  Katsuyoshi Matsuura ,  Yoshimasa Horii ,  Masaki Kurasawa ,  Kazuaki Takai

IPC分类号： H01L21/44

CPC分类号： H01L28/40 ,  H01L21/3144 ,  H01L27/0629

摘要： There are provided a step of forming an insulating film over a semiconductor substrate, a step of exciting a plasma of a gas having a molecular structure in which hydrogen and nitrogen are bonded and then irradiating the plasma onto the insulating film, a step of forming a self-orientation layer made of substance having a self-orientation characteristic on the insulating film, and a step of forming a first conductive film made of conductive substance having the self-orientation characteristic on the self-orientation layer.

摘要翻译： 提供了在半导体衬底上形成绝缘膜的步骤，激发具有其中键合有氢和氮的分子结构的气体的等离子体并随后将等离子体照射到绝缘膜上的步骤，形成 在绝缘膜上具有自取向特性的物质形成的自取向层，以及在自取向层上形成具有自取向特性的导电性物质的第一导电膜的工序。

公开(公告)号：US06855974B2

公开(公告)日：2005-02-15

申请号：US10743814

申请日：2003-12-24

申请人： Osamu Matsuura ,  Kenji Maruyama ,  Kazuaki Takai

发明人： Osamu Matsuura ,  Kenji Maruyama ,  Kazuaki Takai

IPC分类号： C23C14/08 ,  C23C16/40 ,  G01Q30/04 ,  G01Q30/10 ,  G01Q70/04 ,  G01Q70/14 ,  H01L21/02 ,  H01L21/316 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/115 ,  H01L31/062

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/56

摘要： A ferroelectric capacitor includes a pair of electrodes, and at least one ferroelectric held between the pair of electrodes, in which the ferroelectric includes a first ferroelectric layer having a surface roughness (RMS) determined with an atomic force microscope of 10 nm or more; and a second ferroelectric layer being arranged adjacent to the first ferroelectric layer and having an RMS of 5 nm or less. A process produces such a ferroelectric capacitor by forming a first ferroelectric layer on or above one of a pair of electrodes at a temperature equal to or higher than a crystallization temperature at which the first ferroelectric layer takes on a ferroelectric crystalline structure, and forming a second ferroelectric layer on the first ferroelectric layer at a temperature lower than a crystallization temperature at which the second ferroelectric layer takes on a ferroelectric crystalline structure.

摘要翻译： 铁电电容器包括一对电极，并且至少一个铁电体保持在该对电极之间，其中铁电体包括由原子力显微镜确定的表面粗糙度（RMS）为10nm以上的第一铁电层; 并且第二铁电层被布置为与第一铁电层相邻并且具有5nm或更小的RMS。 一种工艺通过在等于或高于第一铁电层承受铁电晶体结构的结晶温度的温度下，在一对电极中的一个或其上方形成第一铁电层来制造这种铁电电容器，并且形成第二铁电层 铁电层在第一铁电体层上的温度低于第二铁电层呈铁电晶体结构的结晶温度。