公开(公告)号：US08399180B2

公开(公告)日：2013-03-19

申请号：US12687289

申请日：2010-01-14

申请人： Mukta G. Farooq ,  Ramona Kei ,  Emily R. Kinser ,  Anthony D. Lisi ,  Richard Wise ,  Hakeem Yusuff

发明人： Mukta G. Farooq ,  Ramona Kei ,  Emily R. Kinser ,  Anthony D. Lisi ,  Richard Wise ,  Hakeem Yusuff

IPC分类号： G03F7/26

CPC分类号： H01L21/76898 ,  H01L21/3085 ,  H01L25/0657 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is disclosed which includes patterning a photoresist layer on a substrate of a structure, removing a first portion of the photoresist layer to expose a first area of the substrate, etching the first area to form a cavity having a first depth, removing a second portion of the photoresist to expose an additional area of the substrate, and etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure.

摘要翻译： 公开了一种方法，其包括在结构的衬底上图案化光致抗蚀剂层，去除光致抗蚀剂层的第一部分以暴露衬底的第一区域，蚀刻第一区域以形成具有第一深度的空腔， 光致抗蚀剂的一部分以暴露衬底的附加区域，并且蚀刻该腔以暴露结构中的第一导体和附加区域以暴露该结构中的第二导体。

公开(公告)号：US20110171582A1

公开(公告)日：2011-07-14

申请号：US12687289

申请日：2010-01-14

申请人： Mukta G. Farooq ,  Ramona Kei ,  Emily R. Kinser ,  Anthony D. Lisi ,  Richard Wise ,  Hakeem Yusuff

发明人： Mukta G. Farooq ,  Ramona Kei ,  Emily R. Kinser ,  Anthony D. Lisi ,  Richard Wise ,  Hakeem Yusuff

IPC分类号： G03F7/20

CPC分类号： H01L21/76898 ,  H01L21/3085 ,  H01L25/0657 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is disclosed which includes patterning a photoresist layer on a substrate of a structure, removing a first portion of the photoresist layer to expose a first area of the substrate, etching the first area to form a cavity having a first depth, removing a second portion of the photoresist to expose an additional area of the substrate, and etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure.

摘要翻译： 公开了一种方法，其包括在结构的衬底上图案化光致抗蚀剂层，去除光致抗蚀剂层的第一部分以暴露衬底的第一区域，蚀刻第一区域以形成具有第一深度的空腔， 光致抗蚀剂的一部分以暴露衬底的附加区域，并且蚀刻该腔以暴露结构中的第一导体和附加区域以暴露该结构中的第二导体。

公开(公告)号：US20110221062A1

公开(公告)日：2011-09-15

申请号：US12721032

申请日：2010-03-10

申请人： Lawrence A. Clevenger ,  Maxime Darnon ,  Satyanarayana V. Nitta ,  Anthony D. Lisi ,  Qinghuang Lin

发明人： Lawrence A. Clevenger ,  Maxime Darnon ,  Satyanarayana V. Nitta ,  Anthony D. Lisi ,  Qinghuang Lin

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L23/4821 ,  C08L83/04 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/31 ,  H01L21/3105 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： Methods for producing air gap-containing metal-insulator interconnect structures for VLSI and ULSI devices using a photo-patternable low k material as well as the air gap-containing interconnect structure that is formed are disclosed. More particularly, the methods described herein provide interconnect structures built in a photo-patternable low k material in which air gaps are defined by photolithography in the photo-patternable low k material. In the methods of the present invention, no etch step is required to form the air gaps. Since no etch step is required in forming the air gaps within the photo-patternable low k material, the methods disclosed in this invention provide highly reliable interconnect structures.

摘要翻译： 公开了使用可光图案化的低k材料制造用于VLSI和ULSI器件的含气隙的金属 - 绝缘体互连结构的方法以及形成的含气隙的互连结构。 更具体地说，本文描述的方法提供内置于光可图案化的低k材料中的互连结构，其中通过光刻法在光可图案化的低k材料中限定气隙。 在本发明的方法中，不需要蚀刻步骤来形成气隙。 由于在形成可光图案化的低k材料内的气隙中不需要蚀刻步骤，所以本发明公开的方法提供了高度可靠的互连结构。

公开(公告)号：US20110108989A1

公开(公告)日：2011-05-12

申请号：US12616259

申请日：2009-11-11

申请人： Lawerence A. Clevenger ,  Maxime Darnon ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

发明人： Lawerence A. Clevenger ,  Maxime Darnon ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L21/31144 ,  H01L21/7682

摘要： A process to produce an airgap on a substrate having a dielectric layer comprises defining lines by lithography where airgaps are required. The lines' dimensions are shrunk by a trimming process (isotropic etching). The tone of the patterns is reversed by applying a planarizing layer which is etched down to the top of the patterns. The photoresist is removed, leading to sub-lithographic trenches which are transferred into a cap layer and eventually into the dielectric between two metal lines. The exposed dielectric is eventually damaged, and is etched out, leading to airgaps between metal lines. The gap is sealed by the pinch-off occurring during the deposition of the subsequent dielectric.

摘要翻译： 在具有电介质层的基板上产生气隙的方法包括通过需要气隙的光刻来定义线。 线的尺寸通过修整工艺（各向同性蚀刻）收缩。 图案的色调通过施加被向下蚀刻到图案的顶部的平坦化层来反转。 去除光致抗蚀剂，导致亚光刻沟槽，其转移到盖层中，最终转移到两条金属线之间的电介质中。 暴露的电介质最终被损坏，并被蚀刻掉，导致金属线之间的气隙。 间隙通过在随后的电介质的沉积期间发生的夹断来密封。

公开(公告)号：US08629561B2

公开(公告)日：2014-01-14

申请号：US13540931

申请日：2012-07-03

申请人： Lawrence A. Clevenger ,  Maxime Darnon ,  Qinghuang Lin ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

发明人： Lawrence A. Clevenger ,  Maxime Darnon ,  Qinghuang Lin ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/70

CPC分类号： H01L23/53295 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/31 ,  H01L21/3105 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76835 ,  H01L23/5222 ,  H01L2221/1031 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： Methods for producing air gap-containing metal-insulator interconnect structures for VLSI and ULSI devices using a photo-patternable low k material as well as the air gap-containing interconnect structure that is formed are disclosed. More particularly, the methods described herein provide interconnect structures built in a photo-patternable low k material in which air gaps are defined by photolithography in the photo-patternable low k material. In the methods of the present invention, no etch step is required to form the air gaps. Since no etch step is required in forming the air gaps within the photo-patternable low k material, the methods disclosed in this invention provide highly reliable interconnect structures.

摘要翻译： 公开了使用可光图案化的低k材料制造用于VLSI和ULSI器件的含气隙的金属 - 绝缘体互连结构的方法以及形成的含气隙的互连结构。 更具体地说，本文描述的方法提供内置于光可图案化的低k材料中的互连结构，其中通过光刻法在光可图案化的低k材料中限定气隙。 在本发明的方法中，不需要蚀刻步骤来形成气隙。 由于在形成可光图案化的低k材料内的气隙中不需要蚀刻步骤，所以本发明公开的方法提供了高度可靠的互连结构。

公开(公告)号：US08241992B2

公开(公告)日：2012-08-14

申请号：US12776885

申请日：2010-05-10

申请人： Lawrence A. Clevenger ,  Maxime Darnon ,  Qinghuang Lin ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

发明人： Lawrence A. Clevenger ,  Maxime Darnon ,  Qinghuang Lin ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

IPC分类号： H01L21/76 ,  H01L21/4763 ,  H01L21/44

CPC分类号： H01L23/53295 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/31 ,  H01L21/3105 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76835 ,  H01L23/5222 ,  H01L2221/1031 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： Methods for producing air gap-containing metal-insulator interconnect structures for VLSI and ULSI devices using a photo-patternable low k material as well as the air gap-containing interconnect structure that is formed are disclosed. More particularly, the methods described herein provide interconnect structures built in a photo-patternable low k material in which air gaps are defined by photolithography in the photo-patternable low k material. In the methods of the present invention, no etch step is required to form the air gaps. Since no etch step is required in forming the air gaps within the photo-patternable low k material, the methods disclosed in this invention provide highly reliable interconnect structures.

摘要翻译： 公开了使用可光图案化的低k材料制造用于VLSI和ULSI器件的含气隙的金属 - 绝缘体互连结构的方法以及形成的含气隙的互连结构。 更具体地说，本文描述的方法提供内置于光可图案化的低k材料中的互连结构，其中通过光刻法在光可图案化的低k材料中限定气隙。 在本发明的方法中，不需要蚀刻步骤来形成气隙。 由于在形成可光图案化的低k材料内的气隙中不需要蚀刻步骤，所以本发明公开的方法提供了高度可靠的互连结构。

公开(公告)号：US20110020753A1

公开(公告)日：2011-01-27

申请号：US12510001

申请日：2009-07-27

申请人： Lawrence A. Clevenger ,  Maxime Darnon ,  Anthony D. Lisi ,  Satya V. Nitta

发明人： Lawrence A. Clevenger ,  Maxime Darnon ,  Anthony D. Lisi ,  Satya V. Nitta

IPC分类号： G03F7/20

CPC分类号： G03F7/091 ,  G03F7/40 ,  H01L21/3086

摘要： A method for reversing the tone of a lithographic image on a substrate comprises depositing a modifiable material on a substrate; applying a photolithographic material on the modifiable material: defining a removable patterned area in the photolithopgraphic material by photolithograpic means; removing the patterned area to produce an exposed region in the modifiable material that substantially conforms to the patterned area; producing a reacted modifiable material by increasing the etch resistance of the modifable material substantially throughout the exposed region so that the etch resistance of the exposed region comprises a region that substantially conforms to the exposed region; and removing the photoresist and the modifiable material to leave the reacted modifiable material and substrate.

摘要翻译： 用于反转基底上的平版印刷图像的色调的方法包括将可修改材料沉积在基底上; 将光刻材料施加在可修改的材料上：通过光刻手段在光致剪切材料中限定可移除的图案区域; 去除所述图案化区域以在所述可修改材料中产生基本上符合所述图案化区域的暴露区域; 通过增加可修饰材料的基本上在整个曝光区域的耐蚀刻性而产生可反应的可修饰材料，使得暴露区域的耐蚀刻性包括基本上符合曝光区域的区域; 并除去光致抗蚀剂和可修改的材料以留下可反应的可修改的材料和基材。

公开(公告)号：US08896120B2

公开(公告)日：2014-11-25

申请号：US12768267

申请日：2010-04-27

申请人： Lawrence A. Clevenger ,  Maxime Darnon ,  Qinghuang Lin ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

发明人： Lawrence A. Clevenger ,  Maxime Darnon ,  Qinghuang Lin ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L21/02 ,  H01L21/31 ,  H01L21/027 ,  H01L23/522

CPC分类号： H01L21/76829 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/0276 ,  H01L21/31 ,  H01L21/7682 ,  H01L21/76825 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： Methods for producing air gap-containing metal-insulator interconnect structures for VLSI and ULSI devices using a photo-patternable low k material as well as the air gap-containing interconnect structure that is formed are disclosed. More particularly, the methods described herein provide interconnect structures built in a photo-patternable low k material in which air gaps of different depths are defined by photolithography in the photo-patternable low k material. In the methods of the present invention, no etch step is required to form the air gaps. Since no etch step is required in forming the air gaps within the photo-patternable low k material, the methods disclosed in this invention provide highly reliable interconnect structures.

摘要翻译： 公开了使用可光图案化的低k材料制造用于VLSI和ULSI器件的含气隙的金属 - 绝缘体互连结构的方法以及形成的含气隙的互连结构。 更具体地，本文所述的方法提供了内置于可光图案化的低k材料中的互连结构，其中不同深度的气隙通过光刻图案中的低k材料中的光刻来定义。 在本发明的方法中，不需要蚀刻步骤来形成气隙。 由于在形成可光图案化的低k材料内的气隙中不需要蚀刻步骤，所以本发明公开的方法提供了高度可靠的互连结构。

公开(公告)号：US20110260326A1

公开(公告)日：2011-10-27

申请号：US12768267

申请日：2010-04-27

申请人： Lawrence A. Clevenger ,  Maxime Darnon ,  Qinghuang Lin ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

发明人： Lawrence A. Clevenger ,  Maxime Darnon ,  Qinghuang Lin ,  Anthony D. Lisi ,  Satyanarayana V. Nitta

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76829 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/0276 ,  H01L21/31 ,  H01L21/7682 ,  H01L21/76825 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： Methods for producing air gap-containing metal-insulator interconnect structures for VLSI and ULSI devices using a photo-patternable low k material as well as the air gap-containing interconnect structure that is formed are disclosed. More particularly, the methods described herein provide interconnect structures built in a photo-patternable low k material in which air gaps of different depths are defined by photolithography in the photo-patternable low k material. In the methods of the present invention, no etch step is required to form the air gaps. Since no etch step is required in forming the air gaps within the photo-patternable low k material, the methods disclosed in this invention provide highly reliable interconnect structures.

摘要翻译： 公开了使用可光图案化的低k材料制造用于VLSI和ULSI器件的含气隙的金属 - 绝缘体互连结构的方法以及形成的含气隙的互连结构。 更具体地，本文所述的方法提供了内置于可光图案化的低k材料中的互连结构，其中不同深度的气隙通过光刻图案中的低k材料中的光刻来定义。 在本发明的方法中，不需要蚀刻步骤来形成气隙。 由于在形成可光图案化的低k材料内的气隙中不需要蚀刻步骤，所以本发明公开的方法提供了高度可靠的互连结构。

公开(公告)号：US20090283912A1

公开(公告)日：2009-11-19

申请号：US12243440

申请日：2008-10-01

申请人： Hakeem B.S. AKINMADE-YUSUFF ,  Kaushik A. Kumar ,  Anthony D. Lisi

发明人： Hakeem B.S. AKINMADE-YUSUFF ,  Kaushik A. Kumar ,  Anthony D. Lisi

IPC分类号： H01L23/48

CPC分类号： H01L21/76802 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods for fabricating metal wiring layers of a semiconductor device are provided where damascene interconnect structures are formed in a BEOL process that incorporates a dielectric cap-open-first process to achieve hard mask retention and to control the gouging of a buffer oxide layer to prevent exposure of underlying features protected by the buffer oxide layer.

摘要翻译： 提供了制造半导体器件的金属布线层的方法，其中镶嵌互连结构形成在BEOL工艺中，其包括电介质帽开放第一工艺以实现硬掩模保持并且控制缓冲氧化物层的气蚀以防止暴露 由缓冲氧化物层保护的底层特征。