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公开(公告)号：US09973360B2
公开(公告)日：2018-05-15
申请号：US15366273
申请日：2016-12-01
申请人： NXP USA, Inc.
CPC分类号： H04L27/0014 , G06F7/5446 , G06F7/548 , H04L27/206 , H04L2027/0016
摘要： A phase shifter controller arranged to generate phase shift control signals for at least one phase shifter. The phase shifter controller is arranged to receive a first phase value θ1, receive a second phase value θ2, and output phase shift control signals. The phase shifter controller comprises a digital synthesizer arranged to compute a first digital phase shift control value based on the received first phase value θ1, and compute a second digital phase shift control value based on the received second phase value θ2. The phase shifter controller further comprises digital to analogue converters arranged to generate the phase shift control signals based on the derived first and second digital phase shift control values.
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公开(公告)号：US11460542B2
公开(公告)日：2022-10-04
申请号：US16670032
申请日：2019-10-31
申请人： NXP USA, INC.
摘要： Multi-channel radio frequency (RF) transmitter (100) and method of calibrating the transmitter are provided. In an embodiment, the method involves applying an intermediate frequency (IF) signal with different compensation values on a first phase rotator (128) in a first channel transmitter module (TX1) of the transmitter, wherein the different compensation values are designed to compensate for a particular phase influencing factor, applying phase codes with the same different compensation values for different phases on a second phase rotator (132) in a second channel transmitter module (TX2), measuring resultant phase errors due to phase errors of the first and second channel transmitter modules for the different compensation values, and based on the resultant phase errors, selecting one of the different compensation values to be used as a calibrated compensation value for the first and second phase rotators in the first and second channel transmitter modules to compensate for the particular phase influencing factor.
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公开(公告)号：US20220018929A1
公开(公告)日：2022-01-20
申请号：US17361511
申请日：2021-06-29
申请人： NXP USA, INC.
IPC分类号： G01S7/35
摘要： A radar system includes a hybrid-power amplifier and a power control unit coupled to the hybrid-power amplifier. The power control unit is configured to control the amplification of a chirp signal output by the radar system based upon an assessment of an interchirp time provided by a chirp profile. The interchirp time is a time difference between a first chirp signal and a second chirp signal that are to be output by the hybrid-power amplifier. When the power control unit determines that the interchirp time is less than an interchirp time threshold, a fast-power loop control configuration is used to control the transmitted output power at hybrid amplifier level. When the power control unit determines that the interchirp time is equal to or greater than the interchirp time threshold, a slow-power loop configuration or a combination of the slow-loop configuration and the fast-loop configuration is used to control the transmitted output power at the hybrid-power amplifier. A look-up table generated by the power control unit in a controller is used to ascertain the control signals and values that are to be used by the hybrid-power amplifier and voltage regulator to amplify the chirp signal.
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公开(公告)号：US20190181079A1
公开(公告)日：2019-06-13
申请号：US15864348
申请日：2018-01-08
申请人： NXP USA, Inc.
发明人： Nishant Lakhera , Gilles Montoriol , Trung Duong , Akhilesh Kumar Singh , Navas Khan Oratti Kalandar
IPC分类号： H01L23/498 , H01L23/00 , H01L21/48 , H01L23/48 , H01L23/538 , H01L25/065 , H01L25/00 , H01L23/31
CPC分类号： H01L23/49816 , H01L21/486 , H01L23/04 , H01L23/10 , H01L23/3114 , H01L23/481 , H01L23/49838 , H01L23/5386 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L25/0652 , H01L25/50 , H01L2224/02377 , H01L2224/0401 , H01L2224/05569 , H01L2224/05572 , H01L2224/05599 , H01L2224/056 , H01L2224/11334 , H01L2224/11849 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73253 , H01L2224/81191 , H01L2224/83192 , H01L2224/92242 , H01L2224/94 , H01L2924/14 , H01L2924/16235 , H01L2924/16251 , H01L2924/3025 , H01L2924/351 , H01L2224/03 , H01L2224/11 , H01L2924/014 , H01L2924/00014
摘要： Embodiments are provided herein for a packaged semiconductor device and method of fabricating, the device including: a semiconductor die; a redistribution layer (RDL) structure on an active side of the semiconductor die, the RDL structure including a plurality of contact pads on an outer surface of the RDL structure; a plurality of external connections attached to the plurality of contact pads; and a support structure including an attachment portion and two or more standing members extending from an inner surface of the attachment portion, wherein a back side of the package body is attached to the inner surface of the attachment portion.
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公开(公告)号：US11796635B2
公开(公告)日：2023-10-24
申请号：US17391278
申请日：2021-08-02
申请人： NXP USA, INC.
CPC分类号： G01S7/4008 , G01S7/4021 , G01S13/26 , H03H11/16
摘要： The disclosure relates to a radar transceiver having a transmitter comprising a phase shifter. Example embodiments include a radar transceiver (200) having a normal mode of transmitter operation and a self-test mode of operation, the transceiver (200) comprising: a digital controller (116) configured to provide a digital control signal indicative of a phase shift; a digital to analogue converter (122) configured to receive the digital control signal and provide an analogue signal in accordance with the phase shift; a phase shifter (124) configured to receive the analogue signal and provide a phase shifted output signal for transmission; a dummy load (240) connected to receive the analogue signal from the digital to analogue converter (122) and to provide an analogue output; a resistor network (331) connected across an output of the dummy load (240); a testing module (335) configured to measure the analogue output of the dummy load (240); and a controller module (339) configured to control operation of the dummy load (240), testing module (335) and digital controller (116) during the self-test mode of operation by: enabling the dummy load (240); operating the digital controller (116) to provide a range of digital control signals to the digital to analogue converter (122); and operate the testing module (335) to measure the analogue output of the dummy load (240) to determine a measure of linearity of the digital to analogue converter (122).
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公开(公告)号：US20200158821A1
公开(公告)日：2020-05-21
申请号：US16670032
申请日：2019-10-31
申请人： NXP USA, INC.
摘要： Multi-channel radio frequency (RF) transmitter (100) and method of calibrating the transmitter are provided. In an embodiment, the method involves applying an intermediate frequency (IF) signal with different compensation values on a first phase rotator (128) in a first channel transmitter module (TX1) of the transmitter, wherein the different compensation values are designed to compensate for a particular phase influencing factor, applying phase codes with the same different compensation values for different phases on a second phase rotator (132) in a second channel transmitter module (TX2), measuring resultant phase errors due to phase errors of the first and second channel transmitter modules for the different compensation values, and based on the resultant phase errors, selecting one of the different compensation values to be used as a calibrated compensation value for the first and second phase rotators in the first and second channel transmitter modules to compensate for the particular phase influencing factor.
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公开(公告)号：US10431534B2
公开(公告)日：2019-10-01
申请号：US15864348
申请日：2018-01-08
申请人： NXP USA, Inc.
发明人： Nishant Lakhera , Gilles Montoriol , Trung Duong , Akhilesh Kumar Singh , Navas Khan Oratti Kalandar
IPC分类号： H01L21/48 , H01L23/498 , H01L23/00 , H01L23/48 , H01L25/065 , H01L25/00 , H01L23/31 , H01L23/538
摘要： Embodiments are provided herein for a packaged semiconductor device and method of fabricating, the device including: a semiconductor die; a redistribution layer (RDL) structure on an active side of the semiconductor die, the RDL structure including a plurality of contact pads on an outer surface of the RDL structure; a plurality of external connections attached to the plurality of contact pads; and a support structure including an attachment portion and two or more standing members extending from an inner surface of the attachment portion, wherein a back side of the package body is attached to the inner surface of the attachment portion.
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公开(公告)号：US20170180169A1
公开(公告)日：2017-06-22
申请号：US15366273
申请日：2016-12-01
申请人： NXP USA, Inc.
CPC分类号： H04L27/0014 , G06F7/5446 , G06F7/548 , H04L27/206 , H04L2027/0016
摘要： A phase shifter controller arranged to generate phase shift control signals for at least one phase shifter. The phase shifter controller is arranged to receive a first phase value θ1, receive a second phase value θ2, and output phase shift control signals. The phase shifter controller comprises a digital synthesizer arranged to compute a first digital phase shift control value based on the received first phase value θ1, and compute a second digital phase shift control value based on the received second phase value θ2. The phase shifter controller further comprises digital to analogue converters arranged to generate the phase shift control signals based on the derived first and second digital phase shift control values.
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