A METHOD OF HIGH TEMPERATURE LAYER TRANSFER
    1.
    发明申请
    A METHOD OF HIGH TEMPERATURE LAYER TRANSFER 有权
    一种高温层传输方法

    公开(公告)号:US20130302970A1

    公开(公告)日:2013-11-14

    申请号:US13990539

    申请日:2011-11-23

    CPC classification number: H01L21/76254

    Abstract: A method of transferring a layer from a donor substrate onto a receiving substrate comprises ionic implantation of at least one species into the donor substrate and forming a layer of concentration of the species intended to form microcavities or platelets; bonding the donor substrate with the receiving substrate by wafer bonding; and splitting at high temperature to split the layer in contact with the receiving substrate by cleavage, at a predetermined cleavage temperature, at the layer of microcavities or platelets formed in the donor substrate. The method further comprises, after the first implantation step and before the splitting step, ionic implantation of silicon ions into the donor substrate to form a layer of concentration of silicon ions in the donor substrate, the layer of concentration of silicon ions at least partially overlapping the layer of concentration of the species intended to form microcavities or platelets.

    Abstract translation: 将一层从供体衬底转移到接收衬底上的方法包括将至少一种物质离子注入供体底物并形成旨在形成微腔或血小板的物质浓度层; 通过晶片接合将施主衬底与接收衬底结合; 并在高温下分裂,以在预定的切割温度下,在形成于供体底物中的微腔或血小板层处切割以分离接触基底的层。 该方法还包括在第一注入步骤之后并且在分离步骤之前,将硅离子离子注入供体衬底以在供体衬底中形成硅离子浓度层,所述硅离子的浓度层至少部分重叠 旨在形成微腔或血小板的物种的浓度层。

    Method of high temperature layer transfer
    2.
    发明授权
    Method of high temperature layer transfer 有权
    高温层转移方法

    公开(公告)号:US09275892B2

    公开(公告)日:2016-03-01

    申请号:US13990539

    申请日:2011-11-23

    CPC classification number: H01L21/76254

    Abstract: A method of transferring a layer from a donor substrate onto a receiving substrate comprises ionic implantation of at least one species into the donor substrate and forming a layer of concentration of the species intended to form microcavities or platelets; bonding the donor substrate with the receiving substrate by wafer bonding; and splitting at high temperature to split the layer in contact with the receiving substrate by cleavage, at a predetermined cleavage temperature, at the layer of microcavities or platelets formed in the donor substrate. The method further comprises, after the first implantation step and before the splitting step, ionic implantation of silicon ions into the donor substrate to form a layer of concentration of silicon ions in the donor substrate, the layer of concentration of silicon ions at least partially overlapping the layer of concentration of the species intended to form microcavities or platelets.

    Abstract translation: 将一层从供体衬底转移到接收衬底上的方法包括将至少一种物质离子注入供体底物并形成旨在形成微腔或血小板的物质浓度层; 通过晶片接合将施主衬底与接收衬底结合; 并在高温下分裂,以在预定的切割温度下,在形成于供体底物中的微腔或血小板层处切割以分离接触基底的层。 该方法还包括在第一注入步骤之后并且在分离步骤之前,将硅离子离子注入供体衬底以在供体衬底中形成硅离子浓度层,所述硅离子的浓度层至少部分重叠 旨在形成微腔或血小板的物种的浓度层。

    FABRICATION PROCESS OF A HYBRID SEMICONDUCTOR SUBSTRATE
    3.
    发明申请
    FABRICATION PROCESS OF A HYBRID SEMICONDUCTOR SUBSTRATE 有权
    混合半导体衬底的制造工艺

    公开(公告)号:US20100289113A1

    公开(公告)日:2010-11-18

    申请号:US12726800

    申请日:2010-03-18

    Abstract: The present invention relates to a method for manufacturing a hybrid semiconductor substrate comprising the steps of (a) providing a hybrid semiconductor substrate comprising a semiconductor-on-insulator (SeOI) region, that comprises an insulating layer over a base substrate and a SeOI layer over the insulating layer, and a bulk semiconductor region, wherein the SeOI region and the bulk semiconductor region share the same base substrate; (b) providing a mask layer over the SeOI region; and (c) forming a first impurity level by doping the SeOI region and the bulk semiconductor region simultaneously such that the first impurity level in the SeOI region is contained within the mask. Thereby avoiding higher number of process steps involved in the manufacturing process of hybrid semiconductor substrate.

    Abstract translation: 本发明涉及一种制造混合半导体衬底的方法,包括以下步骤:(a)提供包括绝缘体上半导体(SeOI)区域的混合半导体衬底,其包括在基底衬底上的绝缘层和SeOI层 在绝缘层和体半导体区域之间,其中SeOI区域和体半导体区域共享相同的基底; (b)在SeOI区域上提供掩模层; 和(c)通过同时掺杂SeOI区域和体半导体区域使得SeOI区域中的第一杂质水平包含在掩模内而形成第一杂质水平。 从而避免了混合半导体衬底的制造过程中涉及的更多数量的工艺步骤。

    Method for producing a semiconductor substrate
    4.
    发明授权
    Method for producing a semiconductor substrate 有权
    半导体基板的制造方法

    公开(公告)号:US07833877B2

    公开(公告)日:2010-11-16

    申请号:US11877456

    申请日:2007-10-23

    CPC classification number: H01L21/02667 H01L21/2022 H01L21/76254

    Abstract: This invention relates to a method for producing a substrate by transferring a layer of a material from a donor substrate to a support substrate, and then by removing a part of the layer of material to form the thin layer. The step of removing a part of the layer of material to form the thin layer comprises forming an amorphous layer in a part of the thin layer, and then recrystallizing the amorphous layer.

    Abstract translation: 本发明涉及一种通过将材料层从供体衬底转移到支撑衬底,然后通过移除材料层的一部分以形成薄层来制造衬底的方法。 除去材料层的一部分以形成薄层的步骤包括在薄层的一部分中形成非晶层,然后使非晶层重结晶。

    Methods for fabricating a germanium on insulator wafer
    5.
    发明授权
    Methods for fabricating a germanium on insulator wafer 有权
    锗绝缘体晶圆的制造方法

    公开(公告)号:US07229898B2

    公开(公告)日:2007-06-12

    申请号:US11029808

    申请日:2005-01-04

    CPC classification number: H01L21/76254

    Abstract: Improved fabrication processes for manufacturing GeOI type wafers are disclosed. In an implementation, a method for fabricating a germanium on insulator wafer includes providing a source substrate having a surface, at least a layer of germanium and a weakened area. The weakened area is located at a predetermined depth in the germanium layer of the source substrate and is generally parallel to the source substrate surface. The technique also includes providing a germanium oxynitride layer in or on the source substrate, bonding the source substrate surface to a handle substrate to form a source-handle structure, and detaching the source substrate from the source-handle structure at the weakened area of the source substrate to create the germanium on insulator wafer having, as a surface, a useful layer of germanium.

    Abstract translation: 公开了用于制造GeOI型晶片的改进的制造工艺。 在一个实施方案中,用于制造绝缘体上硅晶片的方法包括提供具有表面,至少一层锗和弱化区域的源极衬底。 弱化区域位于源极衬底的锗层中的预定深度处,并且大致平行于源极衬底表面。 该技术还包括在源极衬底中或其上提供氮氧化锗层,将源极衬底表面接合到处理衬底上以形成源极 - 手柄结构,以及在源极 - 手柄结构的弱化区域处将源极衬底与源极 - 源衬底以形成绝缘体上的晶圆,其具有作为表面的锗的有用层。

    Method for manufacturing heterostructures
    6.
    发明授权
    Method for manufacturing heterostructures 失效
    异质结构制造方法

    公开(公告)号:US08263475B2

    公开(公告)日:2012-09-11

    申请号:US12747099

    申请日:2009-01-27

    CPC classification number: H01L21/76254 H01L21/2007 H01L21/76256

    Abstract: A method for manufacturing heterostructures for applications in the fields of electronics, optics or opto-electronics. This method includes providing a silicon oxide layer with a thickness of less than or equal to 25 nanometers on one of a donor substrate or a receiver substrate or on both substrates, heat treating the substrate(s) that contains the silicon oxide layer at 900° C. to 1,200° C. under a neutral or reducing atmosphere that contains at least one of argon or hydrogen to form layer trapping through-holes inside the silicon oxide, bonding the substrates together at a bonding interface with the silicon oxide layer(s) positioned between them, reinforcing the bonding by annealing the substrates at 25° C. to 500° C. such that the trapping holes retaining gas species at the bonding interface, and transferring an active layer as a portion of the donor substrate onto the receiver substrate to obtain the heterostructure.

    Abstract translation: 一种用于电子,光学或光电子领域应用的异质结构的方法。 该方法包括在施主衬底或接收器衬底之一或两个衬底上提供厚度小于或等于25纳米的氧化硅层,在900℃下热处理含有氧化硅层的衬底 在含有氩或氢中的至少一种的中性或还原性气氛下,在至少1200℃,以在氧化硅内部形成层捕获通孔,在与氧化硅层的接合界面处将基板粘合在一起, 定位在它们之间,通过在25℃至500℃下退火衬底来加强接合,使得在接合界面处保留气体种类的捕获孔,并将作为施主衬底的一部分的活性层转移到接收器衬底上 以获得异质结构。

    METHOD FOR MAKING A STRUCTURE COMPRISING A STEP FOR IMPLANTING IONS IN ORDER TO STABILIZE THE ADHESIVE BONDING INTERFACE
    7.
    发明申请
    METHOD FOR MAKING A STRUCTURE COMPRISING A STEP FOR IMPLANTING IONS IN ORDER TO STABILIZE THE ADHESIVE BONDING INTERFACE 审中-公开
    用于制造结构的方法,包括用于将离子注入的步骤,以稳定粘合的接合界面

    公开(公告)号:US20110165758A1

    公开(公告)日:2011-07-07

    申请号:US12997835

    申请日:2009-07-03

    CPC classification number: H01L21/76254

    Abstract: The invention relates to a method for making a structure for use ion applications in the fields of electronics, optics or optoelectronics. The structure includes a thin layer of semiconducting material on a supporting substrate. The method includes bonding the thin layer onto the supporting substrate by molecular adhesion at a bonding interface to obtain a structure; implanting ions at the bonding interface to transfer atoms from the thin layer to transfer atoms between the thin layer and the supporting substrate or vice versa; and heat-treating the structure in order to stabilize the bonding interface.

    Abstract translation: 本发明涉及一种在电子学,光学或光电领域制造用于离子应用的结构的方法。 该结构在支撑衬底上包括薄层的半导体材料。 该方法包括通过在接合界面处的分子粘附将薄层结合到支撑基底上以获得结构; 在结合界面处注入离子以从薄层转移原子以在薄层和支撑衬底之间转移原子,反之亦然; 并对结构进行热处理,以稳定接合界面。

    METHOD FOR DIRECT BONDING TWO SEMICONDUCTOR SUBSTRATES
    8.
    发明申请
    METHOD FOR DIRECT BONDING TWO SEMICONDUCTOR SUBSTRATES 有权
    用于直接结合两个半导体衬底的方法

    公开(公告)号:US20080014712A1

    公开(公告)日:2008-01-17

    申请号:US11624070

    申请日:2007-01-17

    CPC classification number: H01L21/187

    Abstract: The invention provides methods of direct bonding substrates at least one of which includes a layer of semiconductor material that extends over its front face or in the proximity thereof. The provided methods include, prior to bonding, subjecting the bonding face of at least one substrate comprising a semiconductor material to selected heat treatment at a selected temperature and in a selected gaseous atmosphere. The bonded substrates are useful for electronic, optic, or optoelectronic applications.

    Abstract translation: 本发明提供了直接接合基底的方法,其中至少一个包括在其前表面或其附近延伸的半导体材料层。 所提供的方法包括,在接合之前,使包含半导体材料的至少一个衬底的结合面在所选择的温度和选定的气体气氛中进行选择的热处理。 键合的衬底可用于电子,光学或光电子应用。

    Method for transferring a thin layer including a controlled disturbance of a crystalline structure
    9.
    发明申请
    Method for transferring a thin layer including a controlled disturbance of a crystalline structure 有权
    用于转移包含晶体结构受控干扰的薄层的方法

    公开(公告)号:US20060099779A1

    公开(公告)日:2006-05-11

    申请号:US11305444

    申请日:2005-12-16

    CPC classification number: H01L21/76254

    Abstract: The present invention relates to a method for transferring a thin useful layer from a donor substrate having an ordered crystalline structure to a receiver substrate. The method includes creation of a weakened zone in the donor substrate to define the layer to be transferred from the donor substrate. The crystalline structure of a surface region of the donor substrate is disturbed so as to create a disturbed superficial region within the thickness of the donor substrate, and thus define a disturbance interface between the disturbed superficial region and a subjacent region of the donor substrate for which the crystalline structure remains unchanged. Next, the donor substrate is subjected to a recrystallization annealing in order to at least partial recrystallize of the disturbed region, starting from the crystalline structure of the subjacent region of the donor substrate, and to create a zone of crystalline defects in the plane of the disturbance interface. One or several species are introduced into the thickness of the donor substrate to create the weakened zone, with the species being introduced with introduction parameters that are adjusted to introduce a maximum number of species at the zone of crystalline defects.

    Abstract translation: 本发明涉及一种从具有有序晶体结构的施主衬底向接收衬底转移薄有用层的方法。 该方法包括在施主衬底中产生弱化区以限定要从供体衬底转移的层。 施主衬底的表面区域的晶体结构受到干扰,从而在施主衬底的厚度内产生干扰的表面区域,从而限定受干扰的表面区域和施主衬底的下部区域之间的干扰界面, 晶体结构保持不变。 接下来,对施主衬底进行再结晶退火,以便从施主衬底的下部区域的结晶结构开始至少部分地重新结晶受阻区域,并在该平面内产生晶体缺陷区域 扰动界面。 将一个或多个物质引入施主衬底的厚度以产生弱化区域,其中引入物质,引入参数被调整以在晶体缺陷区域引入最大数量的物质。

    Thermal treatment of a semiconductor layer
    10.
    发明申请
    Thermal treatment of a semiconductor layer 审中-公开
    半导体层的热处理

    公开(公告)号:US20060014363A1

    公开(公告)日:2006-01-19

    申请号:US11233318

    申请日:2005-09-21

    CPC classification number: H01L21/76254

    Abstract: A method for forming a structure that includes a layer that is removed from a donor wafer that has a first layer made of a semiconductor material containing germanium. The method includes the steps of forming a weakness zone in the thickness of the first layer; bonding the donor wafer to a host wafer; and supplying energy so as to weaken the donor wafer at the level of the zone of weakness. The zone of weakness is formed by subjecting the donor wafer to a co-implantation of at least two different atomic species, while the bonding is carried out by performing a thermal treatment at a temperature between 300° C. and 400° C. for a duration of from 30 minutes to four hours.

    Abstract translation: 一种用于形成结构的方法,该结构包括从具有由含锗的半导体材料制成的第一层的施主晶片上去除的层。 该方法包括以下步骤:在第一层的厚度上形成弱区; 将施主晶片键合到主晶片; 并提供能量以便在弱化区的水平上削弱施主晶片。 弱化区通过使施主晶片经受至少两种不同原子物质的共同注入而形成,而通过在300℃和400℃之间的温度下进行热处理来进行接合, 持续时间为30分钟至4小时。

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