公开(公告)号：US20190214525A1

公开(公告)日：2019-07-11

申请号：US15754959

申请日：2016-08-23

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Barbara Behr ,  Andreas Weimar ,  Mathias Wendt ,  Marcus Zenger

IPC: H01L33/00 ,  H01L33/62 ,  H01L23/00

CPC classification number: H01L33/0079 ,  H01L24/29 ,  H01L24/30 ,  H01L24/33 ,  H01L24/83 ,  H01L33/00 ,  H01L33/32 ,  H01L33/62 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/30505 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33505 ,  H01L2224/83805 ,  H01L2224/8381 ,  H01L2924/3511

Abstract: A device and a method for producing a device are disclosed. In an embodiment the device includes a first component; a second component; and a connecting element arranged between the first component and the second component, wherein the connecting element comprises at least a first phase and a second phase, wherein the first phase comprises a first metal having a first concentration, a second metal having a second concentration and a third metal having a third concentration, wherein the second phase comprises the first metal having a fourth concentration, the second metal and the third metal, wherein the first metal, the second metal and the third metal are different from one another and are suitable for reacting at a processing temperature of less than 200° C., and wherein the following applies: c11≥c25 and c11 ≥c13≥c12.

公开(公告)号：US10204880B2

公开(公告)日：2019-02-12

申请号：US15754872

申请日：2016-08-23

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Barbara Behr ,  Mathias Wendt ,  Marcus Zenger

IPC: H01L23/485 ,  H01L23/00 ,  H01L33/62 ,  H01L23/532 ,  B23K35/32 ,  B23K35/30

Abstract: A device and a method for producing a device are disclosed. In an embodiment the device includes a first component, a second component and a connecting element directly arranged between the first component and the second component, wherein the connecting element includes at least a first metal, which is formed as an adhesive layer, a diffusion barrier and a component of a first phase and a second phase of the connecting element, wherein the adhesive layer is arranged on the first component and/or the second component, wherein the first phase and/or the second phase includes, besides the first metal, further metals different from the first metal, wherein a concentration of the first metal in the first phase is greater than a concentration of the first metal in the second phase, and wherein the connecting element includes a layer of a silicide of the first metal.

公开(公告)号：US10046408B2

公开(公告)日：2018-08-14

申请号：US14724682

申请日：2015-05-28

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： Barbara Behr ,  Andreas Ploessl ,  Mathias Wendt ,  Marcus Zenger

IPC: B32B15/00 ,  B23K1/00 ,  F27D3/00 ,  B32B15/01 ,  B32B9/00 ,  B32B7/04 ,  B23K35/26 ,  B23K35/30 ,  B23K35/32 ,  C22C5/02 ,  C22C13/00 ,  C22C5/04 ,  C22C28/00 ,  H01L23/00 ,  H01L33/00

Abstract: A device is specified, said device comprising a first component (1), a second component (2), and a connecting component (3) comprising at least a first region (31) and at least a second region (32). The composition of the first region (31) differs from the composition of the second region (32). The connecting component (3) is arranged between the first component (1) and the second component (2). The connecting component (3) comprises different kinds of metals, the first region (31) of the connecting component (3) comprises a first metal (41), and the concentration of the first metal (41) is greater in the first region (31) than the concentration of the first metal (41) in the second region (32).

公开(公告)号：US20160346857A1

公开(公告)日：2016-12-01

申请号：US14724682

申请日：2015-05-28

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： Barbara Behr ,  Andreas Ploessl ,  Mathias Wendt ,  Marcus Zenger

IPC: B23K1/00 ,  B32B15/01 ,  B32B9/00 ,  B32B7/04 ,  C22C28/00 ,  B23K35/30 ,  B23K35/32 ,  C22C5/02 ,  C22C13/00 ,  C22C5/04 ,  F27D3/00 ,  B23K35/26

CPC classification number: B23K1/0016 ,  B23K1/0006 ,  B23K35/26 ,  B23K35/3013 ,  B23K35/322 ,  B32B7/04 ,  B32B9/002 ,  B32B9/005 ,  B32B15/01 ,  B32B15/018 ,  B32B2457/00 ,  C22C5/02 ,  C22C5/04 ,  C22C13/00 ,  C22C28/00 ,  F27D3/00 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L33/0079 ,  H01L2224/2908 ,  H01L2224/29099 ,  H01L2224/83825

Abstract: A device is specified, said device comprising a first component (1), a second component (2), and a connecting component (3) comprising at least a first region (31) and at least a second region (32). The composition of the first region (31) differs from the composition of the second region (32). The connecting component (3) is arranged between the first component (1) and the second component (2). The connecting component (3) comprises different kinds of metals, the first region (31) of the connecting component (3) comprises a first metal (41), and the concentration of the first metal (41) is greater in the first region (31) than the concentration of the first metal (41) in the second region (32).

Abstract translation: 指定设备，所述设备包括第一组件（1），第二组件（2）和至少包括第一区域（31）和至少第二区域（32）的连接组件（3）。 第一区域（31）的组成与第二区域（32）的组成不同。 连接部件（3）布置在第一部件（1）和第二部件（2）之间。 连接部件（3）包括不同种类的金属，连接部件（3）的第一区域（31）包括第一金属（41），并且第一金属（41）的浓度在第一区域 31）比第二区域（32）中的第一金属（41）的浓度高。

公开(公告)号：US20200234976A1

公开(公告)日：2020-07-23

申请号：US16489726

申请日：2018-02-28

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Mathias Wendt ,  Klaus Müller ,  Laurent Tomasini

IPC: H01L21/48 ,  H01L23/498

Abstract: A method of attaching a semiconductor chip to a lead frame, including A) providing a semiconductor chip, B) applying a solder metal layer sequence on the semiconductor chip, C) providing a lead frame, D) applying a metallization layer sequence on the lead frame, E) applying the semiconductor chip on the lead frame via the solder metal layer sequence and the metallization layer sequence, and F) heating the arrangement produced under E) to attach the semiconductor chip to the lead frame, wherein the solder metal layer sequence includes a first metallic layer including an indium-tin alloy, a barrier layer arranged above the first metallic layer, and a second metallic layer including gold arranged between the barrier layer and the semiconductor chip.

公开(公告)号：US20200152480A1

公开(公告)日：2020-05-14

申请号：US16604252

申请日：2018-04-18

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Mathias Wendt ,  Andreas Weimar

IPC: H01L21/48 ,  H01L21/768 ,  H01L23/498

Abstract: A method of attaching a semiconductor chip on a lead frame includes A) providing a semiconductor chip, B) applying a solder metal layer sequence to the semiconductor chip, wherein the solder metal layer sequence includes a first metallic layer including indium or an indium-tin alloy, C) providing a lead frame, D) applying a metallization layer sequence to the lead frame, wherein the metallization layer sequence includes a fourth layer including indium and/or tin arranged above the lead frame and a third layer including gold arranged above the fourth layer, E) forming an intermetallic intermediate layer including gold and indium, gold and tin or gold, tin and indium, G) applying the semiconductor chip to the lead frame via the solder metal layer sequence and the intermetallic intermediate layer, and H) heating the arrangement produced in G) to attach the semiconductor chip to the lead frame.

公开(公告)号：US11842980B2

公开(公告)日：2023-12-12

申请号：US17284739

申请日：2019-10-17

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Mathias Wendt ,  Simeon Katz ,  Pascal Porten

IPC: H01L23/00

CPC classification number: H01L24/81 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/13017 ,  H01L2224/13669 ,  H01L2224/16237 ,  H01L2224/1703 ,  H01L2224/17515 ,  H01L2224/8102 ,  H01L2224/81031 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2924/1204

Abstract: The method of producing an electronic component (100) comprises a step A) of providing a semiconductor chip (2) having an underside (20), having a plurality of contact pins (21), and having at least one positioning pin (25) protruding from the underside. The contact pins are adapted to electrically contact the semiconductor chip. The positioning pin narrows in the direction away from the underside and protrudes further from the underside than the contact pins. The semiconductor chip is placed on the connection carrier, with the contact pins each being inserted into a contact recess and the positioning pin being inserted into the positioning recess. The contact pins are immersed in the molten solder material.

公开(公告)号：US11127602B2

公开(公告)日：2021-09-21

申请号：US16489726

申请日：2018-02-28

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Mathias Wendt ,  Klaus Müller ,  Laurent Tomasini

IPC: H01L21/48 ,  H01L23/498 ,  H01L33/00 ,  H01S5/0237 ,  H01L23/48 ,  B23K1/00

Abstract: A method of attaching a semiconductor chip to a lead frame, including A) providing a semiconductor chip, B) applying a solder metal layer sequence on the semiconductor chip, C) providing a lead frame, D) applying a metallization layer sequence on the lead frame, E) applying the semiconductor chip on the lead frame via the solder metal layer sequence and the metallization layer sequence, and F) heating the arrangement produced under E) to attach the semiconductor chip to the lead frame, wherein the solder metal layer sequence includes a first metallic layer including an indium-tin alloy, a barrier layer arranged above the first metallic layer, and a second metallic layer including gold arranged between the barrier layer and the semiconductor chip.

公开(公告)号：US20210351156A1

公开(公告)日：2021-11-11

申请号：US17284739

申请日：2019-10-17

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Mathias Wendt ,  Simeon Katz ,  Pascal Porten

IPC: H01L23/00

Abstract: In an embodiment a method includes providing a semiconductor chip having a plurality of contact pins, at least one positioning pin and an underside, wherein the contact pins and the positioning pin protrude from the underside, respectively, wherein the contact pins are configured for making electrical contact with the semiconductor chip, wherein the positioning pin narrows in a direction away from the underside, and wherein the positioning pin protrudes further from the underside than the contact pins, providing a connection carrier having a plurality of contact recesses, at least one positioning recess and an upper side, wherein each contact recess is at least partially filled with a solder material, heating the solder material in the contact recesses to a joining temperature at which the solder material at least partially melts and placing the semiconductor chip on the connection carrier, wherein each contact pin is inserted into a contact recess and the positioning pin is inserted into the positioning recess.

公开(公告)号：US10431715B2

公开(公告)日：2019-10-01

申请号：US15754959

申请日：2016-08-23

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Barbara Behr ,  Andreas Weimar ,  Mathias Wendt ,  Marcus Zenger

IPC: H01L33/00 ,  H01L23/00 ,  H01L33/62 ,  H01L33/32

Abstract: A device and a method for producing a device are disclosed. In an embodiment the device includes a first component; a second component; and a connecting element arranged between the first component and the second component, wherein the connecting element comprises at least a first phase and a second phase, wherein the first phase comprises a first metal having a first concentration, a second metal having a second concentration and a third metal having a third concentration, wherein the second phase comprises the first metal having a fourth concentration, the second metal and the third metal, wherein the first metal, the second metal and the third metal are different from one another and are suitable for reacting at a processing temperature of less than 200° C., and wherein the following applies: c11≥c25 and c11≥c13≥c12.