Abstract:
An optoelectronic semiconductor component includes a first functional region having an active zone provided for generating radiation or for receiving radiation, and a second functional region, which is suitable for contributing to the driving of the first functional region. The first functional region and the second functional region are integrated on the same carrier substrate.
Abstract:
In at least one embodiment of the optoelectronic semiconductor component (1), the optoelectronic semiconductor component has a support (2). At least one optoelectronic semiconductor chip (3) with a radiation outlet face (30) is applied onto a support upper face (20). A sacrificial layer (5) is located over the radiation outlet face (30) in the direction away from the support (2). A housing body (6) which has a housing upper face (60) is molded around the semiconductor chip (3) and/or around the sacrificial layer (5) in a lateral direction parallel to the radiation outlet face (30). A sacrificial layer (5) upper face (50) which faces away from the radiation outlet face (30) is free of a housing body (6) material.
Abstract:
An optoelectronic semiconductor component includes a first functional region having an active zone provided for generating radiation or for receiving radiation, and a second functional region, which is suitable for contributing to the driving of the first functional region. The first functional region and the second functional region are integrated on the same carrier substrate.
Abstract:
An optoelectronic semiconductor component includes a first functional region having an active zone provided for generating radiation or for receiving radiation, and a second functional region, which is suitable for contributing to the driving of the first functional region. The first functional region and the second functional region are integrated on the same carrier substrate.
Abstract:
In at least one embodiment of the optoelectronic semiconductor component (1), the optoelectronic semiconductor component has a support (2). At least one optoelectronic semiconductor chip (3) with a radiation outlet face (30) is applied onto a support upper face (20). A sacrificial layer (5) is located over the radiation outlet face (30) in the direction away from the support (2). A housing body (6) which has a housing upper face (60) is molded around the semiconductor chip (3) and/or around the sacrificial layer (5) in a lateral direction parallel to the radiation outlet face (30). A sacrificial layer (5) upper face (50) which faces away from the radiation outlet face (30) is free of a housing body (6) material.
Abstract:
An optoelectronic semiconductor component includes a first functional region having an active zone provided for generating radiation or for receiving radiation, and a second functional region, which is suitable for contributing to the driving of the first functional region. The first functional region and the second functional region are integrated on the same carrier substrate.
Abstract:
An electronic component, a leadframe, and a method for producing an electronic component are disclosed. In an embodiment, the electronic component includes a housing and a leadframe section partly embedded in the housing, wherein the leadframe section includes a first quadrant, a second quadrant, a third quadrant and a fourth quadrant, wherein each of the quadrants has a first leadframe part and a second leadframe part, wherein each first leadframe part includes a chip landing area, wherein the chip landing areas of all four quadrants are arranged adjacently to a common central region of the leadframe section, and wherein the four quadrants are configured symmetrically with respect to one another.
Abstract:
An electronic component, a leadframe, and a method for producing an electronic component are disclosed. In an embodiment, the electronic component includes a housing and a leadframe section partly embedded in the housing, wherein the leadframe section includes a first quadrant, a second quadrant, a third quadrant and a fourth quadrant, wherein each of the quadrants has a first leadframe part and a second leadframe part, wherein each first leadframe part includes a chip landing area, wherein the chip landing areas of all four quadrants are arranged adjacently to a common central region of the leadframe section, and wherein the four quadrants are configured symmetrically with respect to one another.