Module for a video wall
    1.
    发明授权

    公开(公告)号:US10553148B2

    公开(公告)日:2020-02-04

    申请号:US15775574

    申请日:2016-11-11

    Abstract: A module for a video wall includes a first light emitting chip of an image pixel connecting to a first power line by a first electrical terminal, the first light emitting chip connects to a third power line by a second electrical terminal, a second light emitting chip of the image pixel connects to a second power line by the first electrical terminal, the second light emitting chip of the image pixel connects to a fourth power line by the second electrical terminal, the first and/or the second power line are/is a surface metallization, including contact sections, a light emitting chip is arranged on a contact section, at least between contact sections of a first and of a second power line an insulation layer is provided on a carrier, the insulation layer includes openings above the contact sections, and the light emitting chips are arranged in the openings.

    METHOD OF PRODUCING A SEMICONDUCTOR COMPONENT

    公开(公告)号:US20200091372A1

    公开(公告)日:2020-03-19

    申请号:US16466658

    申请日:2017-12-15

    Abstract: A method of producing a semiconductor component includes applying an auxiliary carrier at a first side of a semiconductor body, the auxiliary carrier having a first lateral coefficient of thermal expansion, and applying a connection carrier at a second side of the semiconductor body facing away from the auxiliary carrier, the connection carrier having a second lateral coefficient of thermal expansion, wherein the semiconductor body is grown on a growth substrate different from the auxiliary carrier, the first and the second lateral coefficient of thermal expansion differ by at most 50%, and the growth substrate is removed prior to application of the auxiliary carrier.

    MODULE FOR A VIDEO WALL
    3.
    发明申请

    公开(公告)号:US20180322824A1

    公开(公告)日:2018-11-08

    申请号:US15775574

    申请日:2016-11-11

    Abstract: A module for a video wall includes a first light emitting chip of an image pixel connecting to a first power line by a first electrical terminal, the first light emitting chip connects to a third power line by a second electrical terminal, a second light emitting chip of the image pixel connects to a second power line by the first electrical terminal, the second light emitting chip of the image pixel connects to a fourth power line by the second electrical terminal, the first and/or the second power line are/is a surface metallization, including contact sections, a light emitting chip is arranged on a contact section, at least between contact sections of a first and of a second power line an insulation layer is provided on a carrier, the insulation layer includes openings above the contact sections, and the light emitting chips are arranged in the openings.

    Method of producing a semiconductor component

    公开(公告)号:US11081620B2

    公开(公告)日:2021-08-03

    申请号:US16466658

    申请日:2017-12-15

    Abstract: A method of producing a semiconductor component includes applying an auxiliary carrier at a first side of a semiconductor body, the auxiliary carrier having a first lateral coefficient of thermal expansion, and applying a connection carrier at a second side of the semiconductor body facing away from the auxiliary carrier, the connection carrier having a second lateral coefficient of thermal expansion, wherein the semiconductor body is grown on a growth substrate different from the auxiliary carrier, the first and the second lateral coefficient of thermal expansion differ by at most 50%, and the growth substrate is removed prior to application of the auxiliary carrier.

    Method of producing an optoelectronic component, and optoelectronic component

    公开(公告)号:US10991683B2

    公开(公告)日:2021-04-27

    申请号:US16486559

    申请日:2018-03-06

    Abstract: A method of manufacturing an optoelectronic component includes: A) providing a substrate, B) providing a metallic liquid arranged in a structured manner and in direct mechanical contact on the substrate and including at least one first metal, C) providing semiconductor chips each having a metallic termination layer on their rear side, the metallic termination layer including at least one second metal different from the first metal, and D) self-organized arranging the semiconductor chips on the metallic liquid so that the first metal and the second metal form at least one intermetallic compound having a higher re-melting temperature than the melting temperature of the metallic liquid, wherein the intermetallic compound is a connecting layer between the substrate and the semiconductor chips.

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