公开(公告)号：US20060292755A1

公开(公告)日：2006-12-28

申请号：US11169962

申请日：2005-06-28

申请人： Patrice Parris ,  Weize Chen ,  John McKenna ,  Jennifer Morrison ,  Moaniss Zitouni ,  Richard De Souza

发明人： Patrice Parris ,  Weize Chen ,  John McKenna ,  Jennifer Morrison ,  Moaniss Zitouni ,  Richard De Souza

IPC分类号： H01L29/04 ,  H01L21/82

CPC分类号： H01L27/112 ,  H01L23/5252 ,  H01L27/11206 ,  H01L2924/0002 ,  Y10S438/981 ,  H01L2924/00

摘要： A tunable antifuse element (102, 202, 204, 504, 952) and method of fabricating the tunable antifuse element, including a substrate material (101) having an active area (106) formed in a surface, a gate electrode (104) having at least a portion positioned above the active area (106), and a dielectric layer (110) disposed between the gate electrode (104) and the active area (106). The dielectric layer (110) including the fabrication of one of a tunable stepped structure (127). During operation, a voltage applied between the gate electrode (104) and the active area (106) creates a current path through the dielectric layer (110) and a rupture of the dielectric layer (110) in a plurality of rupture regions (130). The dielectric layer (110) is tunable by varying the stepped layer thicknesses and the geometry of the layer.

摘要翻译： 一种可调谐反熔断元件（102,202,204,504,952）和制造可调谐反熔丝元件的方法，包括在表面上形成有源区（106）的基片材料（101），具有 位于有源区域（106）上方的至少一部分，和设置在栅电极（104）和有源区域（106）之间的电介质层（110）。 介电层（110）包括制造可调阶梯结构（127）之一。 在操作期间，施加在栅极电极（104）和有源区域（106）之间的电压产生穿过介电层（110）的电流路径，并且多个断裂区域（130）中的电介质层（110）的破裂， 。 电介质层（110）可以通过改变阶梯层厚度和层的几何形状来调节。

公开(公告)号：US09978689B2

公开(公告)日：2018-05-22

申请号：US14133217

申请日：2013-12-18

申请人： Md M. Hoque ,  Patrice Parris ,  Weize Chen ,  Richard De Souza

发明人： Md M. Hoque ,  Patrice Parris ,  Weize Chen ,  Richard De Souza

IPC分类号： H01L23/552 ,  G01N27/403 ,  G01N27/414 ,  H01L23/60 ,  H01L29/66

CPC分类号： H01L23/552 ,  G01N27/414 ,  H01L23/60 ,  H01L29/66825 ,  H01L2924/0002 ,  H01L2924/00

摘要： An embodiment of an Ion Sensitive Field Effect Transistor (ISFET) structure includes a substrate, source and drain regions formed within the substrate and spatially separated by a channel region, a gate dielectric and a gate formed over the channel region, multiple conductive structures overlying the surface of the substrate, and one or more protection diode circuits coupled between one or more of the multiple conductive structures and the substrate. The multiple conductive structures include a floating gate structure and a sense plate structure. The floating gate structure is formed over the gate dielectric and includes the gate. The sense plate structure is electrically coupled to the floating gate structure and is configured to sense a concentration of a target ion or molecule in a fluid adjacent to a portion of the sense plate structure.

公开(公告)号：US20110261500A1

公开(公告)日：2011-10-27

申请号：US12765575

申请日：2010-04-22

申请人： Patrice M. Parris ,  Richard J. De Souza ,  Weize Chen ,  Moaniss Zitouni

发明人： Patrice M. Parris ,  Richard J. De Souza ,  Weize Chen ,  Moaniss Zitouni

IPC分类号： H01G4/00 ,  B05D5/12

CPC分类号： H01G4/33 ,  H01G4/232 ,  H01L23/5223 ,  H01L28/86 ,  H01L28/90 ,  H01L2924/0002 ,  H01L2924/00

摘要： Apparatus and related fabrication methods are provided for capacitor structures. One embodiment of a capacitor structure comprises a plurality of consecutive metal layers and another metal layer. Each via layer of a plurality of via layers is interposed between metal layers of the plurality of metal layers. The plurality of metal layers and the plurality of via layers are cooperatively configured to provide a first plurality of vertical conductive structures corresponding to a first electrode and a second plurality of vertical conductive structures corresponding to a second electrode. The plurality of consecutive metal layers form a plurality of vertically-aligned regions and provide intralayer electrical interconnections among the first plurality of vertical conductive structures. The first metal layer provides an intralayer electrical interconnection among the second plurality of vertical conductive structures, wherein each vertically-aligned region has a vertical conductive structure of the second plurality of vertical conductive structures disposed therein.

摘要翻译： 为电容器结构提供了装置和相关的制造方法。 电容器结构的一个实施例包括多个连续的金属层和另一个金属层。 多个通孔层的每个通孔层插入在多个金属层的金属层之间。 多个金属层和多个通孔层协作地构造成提供对应于对应于第二电极的第一电极和第二多个垂直导电结构的第一多个垂直导电结构。 多个连续的金属层形成多个垂直排列的区域，并且在第一多个垂直导电结构之间提供层间电互连。 第一金属层在第二多个垂直导电结构之间提供内层电互连，其中每个垂直对齐区域具有设置在其中的第二多个垂直导电结构的垂直导电结构。

公开(公告)号：US07700996B2

公开(公告)日：2010-04-20

申请号：US12361944

申请日：2009-01-29

申请人： Patrice M. Parris ,  Weize Chen ,  John M. McKenna ,  Jennifer H. Morrison ,  Moaniss Zitouni ,  Richard J. De Souza

发明人： Patrice M. Parris ,  Weize Chen ,  John M. McKenna ,  Jennifer H. Morrison ,  Moaniss Zitouni ,  Richard J. De Souza

IPC分类号： H01L29/94

CPC分类号： H01L27/112 ,  H01L23/5252 ,  H01L27/11206 ,  H01L2924/0002 ,  Y10S438/981 ,  H01L2924/00

摘要： A tunable antifuse element (102, 202, 204, 504, 952) includes a substrate material (101) having an active area (106) formed in a surface, a gate electrode (104) having at least a portion positioned above the active area (106), and a dielectric layer (110) disposed between the gate electrode (104) and the active area (106). The dielectric layer (110) includes a tunable stepped structure (127). During operation, a voltage applied between the gate electrode (104) and the active area (106) creates a current path through the dielectric layer (110) and a rupture of the dielectric layer (110) in a rupture region (130). The dielectric layer (110) is tunable by varying the stepped layer thicknesses and the geometry of the layer.

摘要翻译： 可调谐反熔断元件（102,202,204,504,952）包括具有形成在表面中的有源区域（106）的基板材料（101），栅电极（104），其至少部分位于有源区域 （106）和设置在栅电极（104）和有源区（106）之间的电介质层（110）。 电介质层（110）包括可调阶梯结构（127）。 在操作期间，施加在栅极电极（104）和有源区域（106）之间的电压产生穿过电介质层（110）的电流路径以及在破裂区域（130）中电介质层（110）的破裂。 电介质层（110）可以通过改变阶梯层厚度和层的几何形状来调节。

公开(公告)号：US20090127587A1

公开(公告)日：2009-05-21

申请号：US12361944

申请日：2009-01-29

申请人： Patrice M. Parris ,  Weize Chen ,  John M. McKenna ,  Jennifer H. Morrison ,  Moaniss Zitouni ,  Richard J. De Souza

发明人： Patrice M. Parris ,  Weize Chen ,  John M. McKenna ,  Jennifer H. Morrison ,  Moaniss Zitouni ,  Richard J. De Souza

IPC分类号： H01L29/78 ,  H01L29/86 ,  H01L25/07

CPC分类号： H01L27/112 ,  H01L23/5252 ,  H01L27/11206 ,  H01L2924/0002 ,  Y10S438/981 ,  H01L2924/00

摘要： A tunable antifuse element (102, 202, 204, 504, 952) includes a substrate material (101) having an active area (106) formed in a surface, a gate electrode (104) having at least a portion positioned above the active area (106), and a dielectric layer (110) disposed between the gate electrode (104) and the active area (106). The dielectric layer (110) includes a tunable stepped structure (127). During operation, a voltage applied between the gate electrode (104) and the active area (106) creates a current path through the dielectric layer (110) and a rupture of the dielectric layer (110) in a rupture region (130). The dielectric layer (110) is tunable by varying the stepped layer thicknesses and the geometry of the layer.

摘要翻译： 可调谐反熔断元件（102,202,204,504,952）包括具有形成在表面中的有源区域（106）的基板材料（101），栅电极（104），其至少部分位于有源区域 （106）和设置在栅电极（104）和有源区（106）之间的电介质层（110）。 电介质层（110）包括可调阶梯结构（127）。 在操作期间，施加在栅极电极（104）和有源区域（106）之间的电压产生穿过电介质层（110）的电流路径以及在破裂区域（130）中电介质层（110）的破裂。 电介质层（110）可以通过改变阶梯层厚度和层的几何形状来调节。

公开(公告)号：US07528015B2

公开(公告)日：2009-05-05

申请号：US11169962

申请日：2005-06-28

申请人： Patrice M. Parris ,  Weize Chen ,  John M. McKenna ,  Jennifer H. Morrison ,  Moaniss Zitouni ,  Richard J. De Souza

发明人： Patrice M. Parris ,  Weize Chen ,  John M. McKenna ,  Jennifer H. Morrison ,  Moaniss Zitouni ,  Richard J. De Souza

IPC分类号： H01L21/82 ,  H01L21/44 ,  H01L21/31

CPC分类号： H01L27/112 ,  H01L23/5252 ,  H01L27/11206 ,  H01L2924/0002 ,  Y10S438/981 ,  H01L2924/00

摘要： A tunable antifuse element (102, 202, 204, 504, 952) and method of fabricating the tunable antifuse element, including a substrate material (101) having an active area (106) formed in a surface, a gate electrode (104) having at least a portion positioned above the active area (106), and a dielectric layer (110) disposed between the gate electrode (104) and the active area (106). The dielectric layer (110) including the fabrication of one of a tunable stepped structure (127). During operation, a voltage applied between the gate electrode (104) and the active area (106) creates a current path through the dielectric layer (110) and a rupture of the dielectric layer (110) in a plurality of rupture regions (130). The dielectric layer (110) is tunable by varying the stepped layer thicknesses and the geometry of the layer.

摘要翻译： 一种可调谐反熔断元件（102,202,204,504,952）和制造可调谐反熔丝元件的方法，包括在表面上形成有源区（106）的基片材料（101），具有 位于有源区域（106）上方的至少一部分，和设置在栅电极（104）和有源区域（106）之间的电介质层（110）。 介电层（110）包括制造可调阶梯结构（127）之一。 在操作期间，施加在栅极电极（104）和有源区域（106）之间的电压产生穿过介电层（110）的电流路径，并且多个断裂区域（130）中的电介质层（110）的破裂， 。 电介质层（110）可以通过改变阶梯层厚度和层的几何形状来调节。

公开(公告)号：US09741793B2

公开(公告)日：2017-08-22

申请号：US13448062

申请日：2012-04-16

申请人： Patrice M. Parris ,  Weize Chen

发明人： Patrice M. Parris ,  Weize Chen

IPC分类号： H01L29/08 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/40

CPC分类号： H01L29/0847 ,  H01L21/823418 ,  H01L27/088 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/402 ,  H01L29/66659 ,  H01L29/7835

摘要： An electronic apparatus includes a semiconductor substrate and first and second transistors disposed in the semiconductor substrate. The first transistor includes a channel region and a drain region adjacent the channel region. The second transistor includes a channel region, a false drain region adjacent the channel region, and a drain region electrically coupled to the channel region by a drift region such that the second transistor is configured for operation at a higher voltage level than the first transistor. The respective channel regions of the first and second transistors have a common configuration characteristic.

公开(公告)号：US09537000B2

公开(公告)日：2017-01-03

申请号：US13792876

申请日：2013-03-11

申请人： Weize Chen ,  Patrice M. Parris

发明人： Weize Chen ,  Patrice M. Parris

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/08

CPC分类号： H01L29/7816 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7835

摘要： A semiconductor device includes a substrate having a surface, a composite body region disposed in the substrate, having a first conductivity type, and comprising a body contact region at the surface of the substrate and a well in which a channel is formed during operation, a source region disposed in the semiconductor substrate adjacent the composite body region and having a second conductivity type, and an isolation region disposed between the body contact region and the source region. The composite body region further includes a body conduction path region contiguous with and under the source region, and the body conduction path region has a higher dopant concentration level than the well.

摘要翻译： 半导体器件包括具有表面的衬底，设置在衬底中的复合体区域，具有第一导电类型，并且包括在衬底的表面处的体接触区域和在操作期间形成沟道的阱， 源极区域，设置在与所述复合体区域相邻并具有第二导电类型的所述半导体衬底中;以及隔离区域，设置在所述本体接触区域和所述源极区域之间。 复合体区域还包括与源极区域相邻并且在源极区域附近的体导电路径区域，并且身体传导路径区域具有比阱更高的掺杂剂浓度水平。

公开(公告)号：US09231120B2

公开(公告)日：2016-01-05

申请号：US13537299

申请日：2012-06-29

申请人： Weize Chen ,  Xin Lin ,  Patrice M. Parris

发明人： Weize Chen ,  Xin Lin ,  Patrice M. Parris

IPC分类号： H01L29/872 ,  H01L29/417 ,  H01L29/66 ,  H01L29/06

CPC分类号： H01L29/872 ,  H01L29/0692 ,  H01L29/417 ,  H01L29/66143

摘要： A Schottky diode includes a device structure having a central portion and a plurality of fingers. Distal portions of the fingers overlie leakage current control (LCC) regions. An LCC region is relatively narrow and deep, terminating in proximity to a buried layer of like polarity. Under reverse bias, depletion regions forming in an active region lying between the buried layer and the LCC regions occupy the entire extent of the active region and thereby provide a carrier depleted wall. An analogous depletion region occurs in the active region residing between any pair of adjacent fingers. If the fingers include latitudinal oriented fingers and longitudinal oriented fingers, depletion region blockades in three different orthogonal orientations may occur. The formation of the LCC regions may include the use of a high dose, low energy phosphorous implant using an LCC implant mask and the isolation structures as an additional hard mask.

摘要翻译： 肖特基二极管包括具有中心部分和多个指状物的器件结构。 手指的远端覆盖泄漏电流控制（LCC）区域。 LCC区域相对较窄和深，终止于类似极性的掩埋层附近。 在反向偏压下，在位于掩埋层和LCC区域之间的有源区域中形成的耗尽区域占据有源区域的整个范围，从而提供载流子耗尽的壁。 类似的耗尽区发生在驻留在任何一对相邻手指之间的有源区域中。 如果手指包括纬向取向的指状物和纵向取向的指状物，则可能发生三个不同正交取向的耗尽区域封锁。 LCC区域的形成可以包括使用使用LCC植入物掩模的高剂量，低能量磷植入物以及作为附加硬掩模的隔离结构。

公开(公告)号：US20150316503A1

公开(公告)日：2015-11-05

申请号：US14265622

申请日：2014-04-30

申请人： Md M. Hoque ,  Patrice M. Parris ,  Weize Chen ,  Richard J. De Souza

发明人： Md M. Hoque ,  Patrice M. Parris ,  Weize Chen ,  Richard J. De Souza

IPC分类号： G01N27/414 ,  H01L29/78 ,  H01L29/66

CPC分类号： G01N27/4148 ,  H01L21/28282 ,  H01L27/11531 ,  H01L29/66 ,  H01L29/66409 ,  H01L29/78 ,  H01L29/788

摘要： A differential pair sensing circuit (300) includes control gates (306, 316) for separately programming a reference transistor (350) and a chemically-sensitive transistor (351) to a desired threshold voltage Vt to eliminate the mismatch between the transistors in order to increase the sensitivity and/or accuracy of the sensing circuit without increasing the circuit size.

摘要翻译： 差分对检测电路（300）包括用于将参考晶体管（350）和化学敏感晶体管（351）单独编程为期望阈值电压Vt的控制栅极（306,316），以消除晶体管之间的失配，以便 提高感测电路的灵敏度和/或精度，而不增加电路尺寸。