MULTI-PHASE HEAT DISSIPATING DEVICE FOR AN ELECTRONIC DEVICE

    公开(公告)号:US20170293329A1

    公开(公告)日:2017-10-12

    申请号:US15481665

    申请日:2017-04-07

    Abstract: A device that includes a region comprising an integrated device, and a heat dissipating device coupled to the region comprising the integrated device. The heat dissipating device is configured to dissipate heat away from the region. The heat dissipating device includes a fluid, an evaporator configured to evaporate the fluid, a condenser configured to condense the fluid, an inner wall coupled to the evaporator and the condenser, an outer shell encapsulating the fluid, the evaporator, the condenser and the inner wall, an evaporation portion configured to channel an evaporated fluid from the evaporator to the condenser, wherein the evaporation portion is at least partially defined by the inner wall, and a collection portion configured to channel a condensed fluid from the condenser to the evaporator, wherein the collection portion is at least partially defined by the inner wall. The heat dissipating device may be a multi-phase heat dissipating device.

    Runtime optimization of multi-core system designs for increased operating life and maximized performance

    公开(公告)号:US09606843B2

    公开(公告)日:2017-03-28

    申请号:US14166984

    申请日:2014-01-29

    CPC classification number: G06F9/5094 G06F9/505 G06F9/5066 G06F9/5077

    Abstract: Aspects include computing devices, systems, and methods for adjusting the assignment of tasks to processor cores in a multi-core processing system to increase operating life and maximize device performance by wear-leveling the processor cores. A reliability engine may be configured to collect operation or built in self test data of thermal output and current leakage, and historical operation time for a group of equivalent processor cores configured for the same purpose. Collected data may be applied to a weighted function to determine priorities for each equivalent processor core in the group. The reliability engine may rearrange a virtual processor identification translation table according to the priorities of the equivalent processor cores. A high level operating system may issue a process request specifying a processor core and the specified processor core may be translated to a different processor core according to the order of processor cores dictated by the priorities.

    Runtime Optimization of Multi-core System Designs for Increased Operating Life and Maximized Performance
    8.
    发明申请
    Runtime Optimization of Multi-core System Designs for Increased Operating Life and Maximized Performance 有权
    多核系统设计的运行时优化,提高运行寿命和最大化性能

    公开(公告)号:US20150169382A1

    公开(公告)日:2015-06-18

    申请号:US14166984

    申请日:2014-01-29

    CPC classification number: G06F9/5094 G06F9/505 G06F9/5066 G06F9/5077

    Abstract: Aspects include computing devices, systems, and methods for adjusting the assignment of tasks to processor cores in a multi-core processing system to increase operating life and maximize device performance by wear-leveling the processor cores. A reliability engine may be configured to collect operation or built in self test data of thermal output and current leakage, and historical operation time for a group of equivalent processor cores configured for the same purpose. Collected data may be applied to a weighted function to determine priorities for each equivalent processor core in the group. The reliability engine may rearrange a virtual processor identification translation table according to the priorities of the equivalent processor cores. A high level operating system may issue a process request specifying a processor core and the specified processor core may be translated to a different processor core according to the order of processor cores dictated by the priorities.

    Abstract translation: 方面包括用于在多核处理系统中调整任务分配给处理器核心的计算设备,系统和方法,以通过磨损均衡处理器核来增加操作寿命并最大化设备性能。 可靠性引擎可以被配置为收集热输出和电流泄漏的操作或内置的自测数据,以及为相同目的配置的一组等效处理器核的历史操作时间。 收集的数据可以应用于加权函数以确定组中每个等效处理器核心的优先级。 可靠性引擎可以根据等效处理器核心的优先级重新排列虚拟处理器识别转换表。 高级操作系统可以发出指定处理器核心的处理请求,并且指定的处理器核心可以根据由优先级决定的处理器核心的顺序被转换到不同的处理器核心。

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