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公开(公告)号：US11277562B2
公开(公告)日：2022-03-15
申请号：US16995546
申请日：2020-08-17
Applicant: QUALCOMM Incorporated
Inventor： Young Hoon Kang , Hee Jun Park , Tauseef Kazi , Ron Gaizman , Eran Pinhasov , Meir Tzur
Abstract: Techniques and systems are provided for machine-learning based image stabilization. In some examples, a system obtains a sequence of frames captured by an image capture device during a period of time, and collects motion sensor measurements calculated by a motion sensor associated with the image capture device based on movement of the image capture device during the period of time. The system generates, using a deep learning network and the motion sensor measurements, parameters for counteracting motions in one or more frames in the sequence of frames, the motions resulting from the movement of the image capture device during the period of time. The system then adjusts the one or more frames in the sequence of frames according to the parameters to generate one or more adjusted frames having a reduction in at least some of the motions in the one or more frames.
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公开(公告)号：US10771698B2
公开(公告)日：2020-09-08
申请号：US16120037
申请日：2018-08-31
Applicant: QUALCOMM Incorporated
Inventor： Young Hoon Kang , Hee Jun Park , Tauseef Kazi , Ron Gaizman , Eran Pinhasov , Meir Tzur
Abstract: Techniques and systems are provided for machine-learning based image stabilization. In some examples, a system obtains a sequence of frames captured by an image capture device during a period of time, and collects motion sensor measurements calculated by a motion sensor associated with the image capture device based on movement of the image capture device during the period of time. The system generates, using a deep learning network and the motion sensor measurements, parameters for counteracting motions in one or more frames in the sequence of frames, the motions resulting from the movement of the image capture device during the period of time. The system then adjusts the one or more frames in the sequence of frames according to the parameters to generate one or more adjusted frames having a reduction in at least some of the motions in the one or more frames.
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公开(公告)号：US10187282B2
公开(公告)日：2019-01-22
申请号：US14873154
申请日：2015-10-01
Applicant: QUALCOMM INCORPORATED
Inventor： Hee Jun Park , Alex Tu , James Francis Geekie
Abstract: Various embodiments of methods and systems for modem management in a portable computing device are disclosed. An exemplary method recognizes an input of a key performance indicator (“KPI”) from a plurality of performance indicators. Based on the key performance indicator either manually by a user or automatically based on system status information, the exemplary method determines a particular modem management and control strategy designed to optimize performance of the modem based on the key performance indicator. The determined modem management and control strategy is implemented to cause adjustment of a modem performance level such that the key performance indicator is optimized. Exemplary KPIs include, lower device temperature, maximization of the percentage of time that the modem is operating at a maximum advertised LTE speed, maximization of the average data throughput, maximization of battery life, and minimizing LTE speed transitions over time.
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公开(公告)号：US09823673B2
公开(公告)日：2017-11-21
申请号：US14280631
申请日：2014-05-18
Applicant: QUALCOMM INCORPORATED
Inventor： Hee Jun Park , Young Hoon Kang , Ronald Frank Alton , Christopher Lee Medrano , Jon James Anderson
CPC classification number: G05D23/1917 , G05B15/02 , G06F1/203 , G06F1/206 , G06F1/26 , G06F1/3206 , G06F1/324 , G06F1/3296 , G06F11/30 , G06F11/34 , Y02D10/16
Abstract: Various embodiments of methods and systems for energy efficiency aware thermal management in a portable computing device that contains a heterogeneous, multi-processor system on a chip (“SoC”) are disclosed. Because individual processing components in a heterogeneous, multi-processor SoC may exhibit different processing efficiencies at a given temperature, energy efficiency aware thermal management techniques that compare performance data of the individual processing components at their measured operating temperatures can be leveraged to optimize quality of service (“QoS”) by adjusting the power supplies to, reallocating workloads away from, or transitioning the power mode of, the least energy efficient processing components. In these ways, embodiments of the solution optimize the average amount of power consumed across the SoC to process a MIPS of workload.
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公开(公告)号：US09626295B2
公开(公告)日：2017-04-18
申请号：US14807840
申请日：2015-07-23
Applicant: QUALCOMM INCORPORATED
Inventor： Hee Jun Park , Bohuslav Rychlik
IPC: G06F12/08 , G06F12/084 , G06F12/0815 , G06F9/50
CPC classification number: G06F12/084 , G06F9/46 , G06F9/5088 , G06F12/0815 , G06F2212/314 , G06F2212/621
Abstract: Systems, methods, and computer programs are disclosed for scheduling tasks in a heterogeneous processor cluster architecture in a portable computing device. One embodiment is a system comprising a first processor cluster and a second processor cluster. The first processor cluster comprises a first shared cache, and the second processor cluster comprises a second shared cache. The system further comprises a controller in communication with the first and second processor clusters for performing task migration between the first and second processor clusters. The controller initiates execution of a task on a first processor in the first processor cluster. The controller monitors a processor workload for the first processor and a cache demand associated with the first shared cache while the task is running on the first processor in the first processor cluster. The controller migrates the task to the second processor cluster based on the processor workload and the cache demand.
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Patent Agency Ranking
公开(公告)号：US20160013774A1
公开(公告)日：2016-01-14
申请号：US14330464
申请日：2014-07-14
Applicant: QUALCOMM Incorporated
Inventor： Hee Jun Park , Dexter Tamio Chun
CPC classification number: H03K3/012 , G11C7/1057 , G11C7/1084 , G11C11/4074 , G11C11/4093 , H03K3/011
Abstract: Techniques for adjusting swing voltage for an I/O interface signal are described herein. In one embodiment, a device comprises an input/output (I/O) interface, and an I/O voltage controller. The I/O voltage controller is configured to determine a frequency or temperature of the I/O interface, and to adjust a swing voltage of the I/O interface based at least in part upon the determined frequency or temperature.
Abstract translation: 本文描述了用于调整I / O接口信号的摆动电压的技术。 在一个实施例中，设备包括输入/输出（I / O）接口和I / O电压控制器。 I / O电压控制器被配置为确定I / O接口的频率或温度，并且至少部分地基于所确定的频率或温度来调整I / O接口的摆幅电压。
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公开(公告)号：US11983567B2
公开(公告)日：2024-05-14
申请号：US17982574
申请日：2022-11-08
Applicant: QUALCOMM Incorporated
Inventor： Hee Jun Park , Richard Gerard Hofmann
CPC classification number: G06F9/5027 , G06F9/5094 , G06F13/28 , G06N20/00
Abstract: Certain aspects of the present disclosure provide a method for performing parallel data processing, including: receiving data for parallel processing from a data processing requestor; generating a plurality of data sub-blocks; determining a plurality of data portions in each data sub-block of the plurality of data sub-blocks; changing an order of the plurality of data portions in at least one data sub-block of the plurality of data sub-blocks; providing the plurality of data sub-blocks, including the at least one data sub-block comprising the changed order of the plurality of data portions, to a plurality of processing units for parallel processing; and receiving processed data associated with the plurality of data sub-blocks from the plurality of processing units.
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公开(公告)号：US11884296B2
公开(公告)日：2024-01-30
申请号：US17128554
申请日：2020-12-21
Applicant: QUALCOMM Incorporated
Inventor： Hee Jun Park , Abhinav Goel
CPC classification number: B60W60/0015 , B60W60/0013 , G06N3/002 , G06N3/042 , G06N3/045 , G06N7/046
Abstract: Embodiments include methods performed by a processor of a vehicle for allocating processing resources to concurrently-executing neural networks. The methods may include determining a priority of each of a plurality of neural networks executing on a vehicle processing system based on a contribution of each neural network to overall vehicle safety performance, and allocating computing resources to the plurality of neural networks based on the determined priority of each neural network. In some embodiments, the methods may dynamically adjust hyperparameters of one or more neural networks.
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公开(公告)号：US10296067B2
公开(公告)日：2019-05-21
申请号：US15094909
申请日：2016-04-08
Applicant: QUALCOMM Incorporated
Inventor： Hee Jun Park , Cristian Duroiu
IPC: G06F1/26 , G06F1/324 , G06F1/3234 , G06F1/3287 , G06F1/329 , G06F1/3203
Abstract: In certain aspects, a method for frequency scaling comprises determining whether only a subset of multiple processors is active, wherein the multiple processors share one or more resources. The method also comprises increasing a frequency of at least one processor in the subset of the multiple processors if a determination is made that only the subset of the multiple processors is active and the frequency of the at least one processor is below a frequency threshold. This may be done, for example, to increase the time duration of an idle mode for the one or more shared resources and achieve an overall power reduction for a system including the multiple processors, the one or more shared resources, and/or other function blocks.
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10.发明授权公开(公告)号：US10101756B2
公开(公告)日：2018-10-16
申请号：US14446258
申请日：2014-07-29
Applicant: QUALCOMM INCORPORATED
Inventor： Rajat Mittal , Hee Jun Park , Young Hoon Kang
Abstract: Systems, methods, and computer programs are disclosed for reducing leakage power of a system on chip (SoC). One such method comprises monitoring a plurality of temperature differentials across a respective plurality of thermoelectric coolers on a system on chip (SoC). Each of the thermoelectric coolers is dedicated to a corresponding one of a plurality of chip sections on the SoC. The thermoelectric coolers are controlled based on the plurality of temperature differentials to minimize a sum of a combined power consumption of the plurality of chip sections and the plurality of corresponding dedicated thermoelectric coolers.
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