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    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10056402B2

    公开(公告)日：2018-08-21

    申请号：US15669814

    申请日：2017-08-04

    Applicant: Renesas Electronics Corporation

    Inventor： Tomohiro Hayashi ,  Hiraku Chakihara

    IPC: H01L27/11568 ,  H01L27/11573 ,  H01L29/78 ,  H01L29/423

    CPC classification number: H01L27/11568 ,  H01L27/11573 ,  H01L29/42344 ,  H01L29/785 ,  H01L29/792

    Abstract: Improvements are achieved in the characteristics of a nonvolatile memory. In plan view, in a first isolation region which is an element isolation region surrounded by a first fin, a second fin, a memory gate electrode, and another memory gate electrode, a protruding portion is provided. In a second isolation region which is the element isolation region overlapping the memory gate electrode in plan view, a second isolation portion is provided to set the protruding portion higher in level than the second isolation portion. In a step of lowering a top surface of the element isolation region located between the first and second fins, a part of the element isolation region located between the first and second fins is covered with a mask film to form the protruding portion. Using the protruding portion, a short circuit between the memory gate electrodes due to a gate residue is prevented.

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20160079160A1

    公开(公告)日：2016-03-17

    申请号：US14950987

    申请日：2015-11-24

    Applicant: Renesas Electronics Corporation

    Inventor： Yasushi Ishii ,  Hiraku Chakihara

    IPC: H01L23/522 ,  H01L29/66 ,  H01L21/768 ,  H01L27/115

    CPC classification number: H01L23/5223 ,  H01L21/76805 ,  H01L21/76895 ,  H01L27/11521 ,  H01L27/1157 ,  H01L29/40114 ,  H01L29/42344 ,  H01L29/66545 ,  H01L29/66833 ,  H01L29/7885 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The performances of a semiconductor device are improved. A semiconductor device has a first electrode and a dummy electrode formed apart from each other over a semiconductor substrate, a second electrode formed between the first electrode and the dummy electrode, at the circumferential side surface of the first electrode, and at the circumferential side surface of the dummy electrode, and a capacitive insulation film formed between the first electrode and the second electrode. The first electrode, the second electrode, and the capacitive insulation film form a capacitive element. Further, the semiconductor device has a first plug penetrating through the interlayer insulation film, and electrically coupled with the first electrode, and a second plug penetrating through the interlayer insulation film, and electrically coupled with the portion of the second electrode formed at the side surface of the dummy electrode opposite to the first electrode side.

    Abstract translation: 提高了半导体器件的性能。 半导体器件具有在半导体衬底上彼此分开形成的第一电极和虚拟电极，形成在第一电极和虚拟电极之间的第二电极，在第一电极的周向侧表面处，并且在周向侧表面 以及形成在第一电极和第二电极之间的电容绝缘膜。 第一电极，第二电极和电容绝缘膜形成电容元件。 此外，半导体器件具有穿过层间绝缘膜并与第一电极电耦合的第一插塞和穿过层间绝缘膜的第二插塞，并且与形成在侧表面处的第二电极的部分电连接 与第一电极侧相对的虚拟电极。

    Semiconductor device and a manufacturing method thereof
    4.
    发明授权
    Semiconductor device and a manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US09196748B2

    公开(公告)日：2015-11-24

    申请号：US14146036

    申请日：2014-01-02

    Applicant: Renesas Electronics Corporation

    Inventor： Kentaro Saito ,  Hiraku Chakihara

    IPC: H01L29/66 ,  H01L29/788 ,  H01L29/423 ,  H01L29/792 ,  H01L27/115

    CPC classification number: H01L27/11568 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/28282 ,  H01L21/31111 ,  H01L21/32133 ,  H01L27/1157 ,  H01L29/0642 ,  H01L29/42344 ,  H01L29/4916 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/788 ,  H01L29/792

    Abstract: The performances of a semiconductor device are improved. The semiconductor device has a first control gate electrode and a second control gate electrode spaced along the gate length direction, a first cap insulation film formed over the first control gate electrode, and a second cap insulation film formed over the second control gate electrode. Further, the semiconductor device has a first memory gate electrode arranged on the side of the first control gate electrode opposite to the second control gate electrode, and a second memory gate electrode arranged on the side of the second control gate electrode opposite to the first control gate electrode. The end at the top surface of the first cap insulation film on the second control gate electrode side is situated closer to the first memory gate electrode side than the side surface of the first control gate electrode on the second control gate electrode side.

    Abstract translation: 提高了半导体器件的性能。 半导体器件具有沿着栅极长度方向间隔开的第一控制栅电极和第二控制栅电极，形成在第一控制栅电极上的第一帽绝缘膜，以及形成在第二控制栅电极上的第二帽绝缘膜。 此外，半导体器件具有布置在与第二控制栅电极相对的第一控制栅极侧的第一存储栅极，以及布置在第二控制栅电极与第一控制栅相反的一侧的第二存储栅电极 栅电极。 第二控制栅电极侧的第一帽绝缘膜的顶面的端部比第二控制栅电极侧的第一控制栅电极的侧面更靠近第一存储栅电极侧。

    Method for manufacturing a semiconductor device
    8.
    发明授权
    Method for manufacturing a semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号：US09324726B2

    公开(公告)日：2016-04-26

    申请号：US14802050

    申请日：2015-07-17

    Applicant: Renesas Electronics Corporation

    Inventor： Yoshiyuki Kawashima ,  Hiraku Chakihara ,  Kyoko Umeda ,  Akio Nishida

    IPC: H01L21/336 ,  H01L27/115 ,  H01L21/28

    CPC classification number: H01L27/1157 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11534 ,  H01L27/11573

    Abstract: The performances of a semiconductor device are improved. In a method for manufacturing a semiconductor device, in a memory cell region, a control gate electrode formed of a first conductive film is formed over the main surface of a semiconductor substrate. Then, an insulation film and a second conductive film are formed in such a manner as to cover the control gate electrode, and the second conductive film is etched back. As a result, the second conductive film is left over the sidewall of the control gate electrode via the insulation film, thereby to form a memory gate electrode. Then, in a peripheral circuit region, a p type well is formed in the main surface of the semiconductor substrate. A third conductive film is formed over the p type well. Then, a gate electrode formed of the third conductive film is formed.

    Abstract translation: 提高了半导体器件的性能。 在制造半导体器件的方法中，在存储单元区域中，在半导体衬底的主表面上形成由第一导电膜形成的控制栅电极。 然后，以覆盖控制栅电极的方式形成绝缘膜和第二导电膜，并且将第二导电膜回蚀刻。 结果，第二导电膜经由绝缘膜留在控制栅电极的侧壁上，从而形成存储栅电极。 然后，在外围电路区域中，在半导体衬底的主表面上形成p型阱。 在p型阱上形成第三导电膜。 然后，形成由第三导电膜形成的栅电极。

    SEMICONDUCTOR DEVICE MANUFACTURING METHOD
    10.
    发明申请
    SEMICONDUCTOR DEVICE MANUFACTURING METHOD 审中-公开
    半导体器件制造方法

    公开(公告)号：US20140377889A1

    公开(公告)日：2014-12-25

    申请号：US14304951

    申请日：2014-06-15

    Applicant: Renesas Electronics Corporation

    Inventor： Hiraku Chakihara ,  Akihiro Nakae ,  Masaaki Shinohara ,  Yasushi Ishii

    IPC: H01L21/66 ,  H01L21/033

    CPC classification number: H01L22/12 ,  H01L23/544 ,  H01L27/11573 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device manufacturing method which eliminates the possibility that when a film is processed several times, a thin photoresist film is made over a pattern used as an alignment mark, etc. and the pattern is exposed from the photoresist film and removed in a processing step, in order to improve the reliability of a semiconductor device. Patterns used as alignment marks, etc. are linear trenches as openings in a conductive film made over a semiconductor substrate, thereby preventing the photoresist film over the conductive film from flowing toward the openings in the conductive film.

    Abstract translation: 一种半导体器件制造方法，其消除了当膜被加工数次时，在用作对准标记等的图案上形成薄的光致抗蚀剂膜，并且图案从光致抗蚀剂膜暴露并在处理步骤中去除 ，以提高半导体器件的可靠性。 用作对准标记等的图案是在半导体衬底上形成的导电膜中的开口的线性沟槽，从而防止导电膜上的光致抗蚀剂膜朝向导电膜中的开口流动。

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