Method for producing chip stacks
    3.
    发明授权
    Method for producing chip stacks 有权
    生产芯片堆栈的方法

    公开(公告)号:US07253530B2

    公开(公告)日:2007-08-07

    申请号:US11236311

    申请日:2005-09-26

    申请人: Holger Hubner

    发明人: Holger Hubner

    IPC分类号: H01L23/52 H01L23/48 H01L29/40

    摘要: A plurality of interconnect layers are produced on a top side of one or two semiconductor chips, and are mutually isolated from one another in each case by insulation layers that are patterned in such a way that an interconnect layer applied as bridge makes contact with the interconnects applied previously.

    摘要翻译: 在一个或两个半导体芯片的顶侧上产生多个互连层,并且在每种情况下彼此相互隔离,绝缘层被图案化,使得应用于桥的互连层与互连件接触 以前应用。

    Semiconductor testing apparatus
    4.
    发明授权
    Semiconductor testing apparatus 失效
    半导体测试仪器

    公开(公告)号:US5969534A

    公开(公告)日:1999-10-19

    申请号:US666491

    申请日:1996-07-11

    CPC分类号: G01R1/06783

    摘要: A method and apparatus for the reversible contacting of a semiconductor circuit level to assist in performing a function test. The apparatus includes a testing head having test points arranged at a test side lying opposite the contact surfaces of a semiconductor circuit level. The test points are formed of liquid contacts in recesses in the test side of the testing head wherein the liquid contacts form menisci that project beyond the surface of the testing head. The recesses, in turn, are provided for metallizations which are connected to electrically-conductive leads. In addition, the surface may be provided with a roughening or with etched trenches.

    摘要翻译: PCT No.PCT / DE95 / 00013 Sec。 371日期:1996年7月11日 102(e)日期1996年7月11日PCT 1995年1月9日PCT PCT。 公开号WO95 / 18975 日期1995年7月13日用于半导体电路级的可逆接触以辅助执行功能测试的方法和装置。 该装置包括具有布置在与半导体电路电平的接触表面相对的测试侧的测试点的测试头。 测试点由测试头测试侧的凹槽中的液体触点形成,其中液体触点形成突出超出测试头表面的半月板。 这些凹槽又被提供用于连接到导电引线的金属化。 此外,表面可以设置有粗糙化或具有蚀刻的沟槽。

    Method for producing chip stacks
    6.
    发明申请
    Method for producing chip stacks 有权
    生产芯片堆栈的方法

    公开(公告)号:US20060055051A1

    公开(公告)日:2006-03-16

    申请号:US11236311

    申请日:2005-09-26

    申请人: Holger Hubner

    发明人: Holger Hubner

    IPC分类号: H01L29/40

    摘要: A plurality of interconnect layers are produced on a top side of one or two semiconductor chips, and are mutually isolated from one another in each case by insulation layers that are patterned in such a way that an interconnect layer applied as bridge makes contact with the interconnects applied previously.

    摘要翻译: 在一个或两个半导体芯片的顶侧上产生多个互连层,并且在每种情况下彼此相互隔离,绝缘层被图案化,使得施加于桥上的互连层与互连件接触 以前应用。

    Method for filling contact holes using a doctor blade
    7.
    发明授权
    Method for filling contact holes using a doctor blade 失效
    使用刮刀填充接触孔的方法

    公开(公告)号:US5830803A

    公开(公告)日:1998-11-03

    申请号:US669508

    申请日:1996-07-10

    申请人: Holger Hubner

    发明人: Holger Hubner

    摘要: The method produces liquid contacts in contact holes on a top side of a semiconductor component. The top side is not wettable by material provided for the liquid contacts. The walls and edges of the contact holes are wettable by the material. The contact holes are filled as follows. The material provided for the liquid contacts is applied to the top side by a doctor blade. There is situated on a longitudinal edge of the doctor blade an adhesion strip which is made of a material which is wettable by the material provided for the liquid contacts. The longitudinal edge of the doctor blade is guided at a distance over the top side. The material provided for the liquid contacts is moved in the form of a cylinder between the adhesion stip and the surface of the component.

    摘要翻译: PCT No.PCT / DE95 / 00009 Sec。 371日期:1996年7月10日 102(e)日期1996年7月10日PCT提交1995年1月3日PCT公布。 第WO95 / 19045号公报 日期1995年7月13日该方法在半导体部件的顶侧的接触孔中产生液体接触。 顶面不能通过为液体接触提供的材料而被润湿。 接触孔的壁和边缘可被材料吸湿。 接触孔填充如下。 用于液体触点的材料通过刮刀施加到顶侧。 位于刮刀的纵向边缘上的粘合条,其由可由用于液体接触的材料润湿的材料制成。 刮刀的纵向边缘在顶侧一定距离被引导。 设置用于液体接触的材料以粘合剂和零件的表面之间的气缸的形式移动。

    Method for producing a three-dimensional circuit arrangement
    8.
    发明授权
    Method for producing a three-dimensional circuit arrangement 失效
    三维电路装置的制造方法

    公开(公告)号:US5706578A

    公开(公告)日:1998-01-13

    申请号:US693143

    申请日:1996-08-13

    申请人: Holger Hubner

    发明人: Holger Hubner

    摘要: Substrates (11, 12) each of which having components with contacts (13, 14) are arranged one above the other in a stack in order to produce a three-dimensional circuit arrangement. Metal surfaces (20) are applied onto that main surface (15) of at least one of the substrates (11) which is adjacent to the other substrate, which metal surfaces (20) are soldered to the adjacent main surface (17) of the other substrate (12) in order to produce the mechanical joint between the two substrates (11, 12). The components can be tested before the application of further substrates, and substrates having faulty components are removed by grinding away into the metal surfaces (20).

    摘要翻译: PCT No.PCT / DE95 / 00137 Sec。 371日期:1996年8月13日 102(e)日期1996年8月13日PCT提交1995年2月2日PCT公布。 公开号WO95 / 22840 日期1995年8月24日每个具有触点(13,14)的部件的基板(11,12)以堆叠的方式彼此上下排列,以便产生三维电路装置。 将金属表面(20)施加到与另一基板相邻的至少一个基板(11)的主表面(15)上,该金属表面(20)被焊接到相邻的主表面(17)上 为了在两个基板(11,12)之间产生机械接头,另一个基板(12)。 可以在施加另外的基板之前对部件进行测试,并且通过研磨到金属表面(20)中去除具有错误部件的基板。

    Semiconductor chip stack
    9.
    发明授权
    Semiconductor chip stack 有权
    半导体芯片堆栈

    公开(公告)号:US07229851B2

    公开(公告)日:2007-06-12

    申请号:US11180039

    申请日:2005-07-11

    申请人: Holger Hubner

    发明人: Holger Hubner

    IPC分类号: H01L21/44 H01L21/48 H01L21/50

    摘要: A the semiconductor chip stack in which an intermediate space between semiconductor chips is filled at least along one edge of the upper face of a top chip by a spacer composed of a polymer which can be structured photographically, of photoresist, of an encapsulation compound or an adhesive, and is sealed from the outside. During the passivating process, the connecting contact pads are kept free of the material of this spacer for bonding wires or other external connections on the upper face of the bottom chip.

    摘要翻译: 一种半导体芯片堆叠,其中半导体芯片之间的中间空间至少沿着顶部芯片的上表面的一个边缘被填充的隔离物填充,所述隔离物由可由照相机构成的聚合物,光致抗蚀剂,封装化合物或 粘合剂,并从外部密封。 在钝化过程中,连接接触垫保持没有该间隔物的材料,用于在底部芯片的上表面上接合线或其它外部连接。

    Method for producing a three-dimensional circuit arrangement
    10.
    发明授权
    Method for producing a three-dimensional circuit arrangement 失效
    三维电路装置的制造方法

    公开(公告)号:US5943563A

    公开(公告)日:1999-08-24

    申请号:US776557

    申请日:1997-01-30

    申请人: Holger Hubner

    发明人: Holger Hubner

    摘要: A substrate wafer having components (13) is bonded onto a mount (3) and is thinned from the rear side. After producing a photoresist mask on the rear side of the substrate wafer, the latter is separated in an etching process into individual components (13). After removal of the photoresist mask, a further component (6), in particular a component stack, is applied onto at least one of the individual components (13) and is firmly connected to the individual component (13a).

    摘要翻译: PCT No.PCT / DE95 / 00998 Sec。 371日期1997年1月30日 102(e)日期1997年1月30日PCT 1995年8月1日PCT PCT。 公开号WO96 / 04683 日期1996年2月15日具有部件(13)的基板晶片被接合到安装件(3)上并从后侧变薄。 在衬底晶片的后侧制造光致抗蚀剂掩模之后,将其在蚀刻工艺中分离成各个部件(13)。 在去除光致抗蚀剂掩模之后,将另外的部件(6),特别是部件堆叠施加到至少一个单独的部件(13)上,并且牢固地连接到单个部件(13a)。