FinFET CIRCUIT
    1.
    发明申请
    FinFET CIRCUIT 有权
    FinFET电路

    公开(公告)号:US20140061744A1

    公开(公告)日:2014-03-06

    申请号:US13602714

    申请日:2012-09-04

    IPC分类号: H01L27/06 H01L29/66

    摘要: A capacitor includes a semiconductor substrate. The capacitor also includes a first terminal having a fin disposed on a surface of the semiconductor substrate. The capacitor further includes a dielectric layer disposed onto the fin. The capacitor still further includes a second terminal having a FinFET compatible high-K metal gate disposed proximate and adjacent to the fin.

    摘要翻译: 电容器包括半导体衬底。 电容器还包括具有设置在半导体衬底的表面上的翅片的第一端子。 电容器还包括设置在鳍片上的电介质层。 电容器还包括具有FinFET兼容的高K金属栅极的第二端子,该金属栅极靠近并邻近鳍片。

    Three Dimensional Inductor, Transformer and Radio Frequency Amplifier
    2.
    发明申请
    Three Dimensional Inductor, Transformer and Radio Frequency Amplifier 有权
    三维电感,变压器和射频放大器

    公开(公告)号:US20120056680A1

    公开(公告)日:2012-03-08

    申请号:US13294351

    申请日:2011-11-11

    IPC分类号: H03F3/16

    摘要: A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.

    摘要翻译: 公开了一种三维片上射频放大器,其包括第一和第二变压器和第一晶体管。 第一变压器包括第一和第二电感耦合电感器。 第二变压器包括第三和第四电感耦合电感器。 每个电感器包括在第一金属层中的多个第一段; 第二金属层中的多个第二段; 第一和第二输入以及耦合第一和第二段的多通孔,以形成第一和第二输入之间的连续路径。 第一电感器的第一输入耦合到放大器输入端; 第二电感器的第一输入耦合到第一晶体管栅极; 第三电感器的第一输入耦合到第一晶体管漏极,第四电感器的第一输入耦合到放大器输出端。 第二电感器输入和第一晶体管源耦合到地。

    Three dimensional inductor, transformer and radio frequency amplifier
    4.
    发明授权
    Three dimensional inductor, transformer and radio frequency amplifier 有权
    三维电感,变压器和射频放大器

    公开(公告)号:US08508301B2

    公开(公告)日:2013-08-13

    申请号:US13294351

    申请日:2011-11-11

    IPC分类号: H03F3/14

    摘要: A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.

    摘要翻译: 公开了一种三维片上射频放大器,其包括第一和第二变压器和第一晶体管。 第一变压器包括第一和第二电感耦合电感器。 第二变压器包括第三和第四电感耦合电感器。 每个电感器包括在第一金属层中的多个第一段; 第二金属层中的多个第二段; 第一和第二输入以及耦合第一和第二段的多通孔,以形成第一和第二输入之间的连续路径。 第一电感器的第一输入耦合到放大器输入端; 第二电感器的第一输入耦合到第一晶体管栅极; 第三电感器的第一输入耦合到第一晶体管漏极,第四电感器的第一输入耦合到放大器输出端。 第二电感器输入和第一晶体管源耦合到地。

    Three Dimensional Inductor and Transformer
    5.
    发明申请
    Three Dimensional Inductor and Transformer 有权
    三维电感和变压器

    公开(公告)号:US20110084765A1

    公开(公告)日:2011-04-14

    申请号:US12576033

    申请日:2009-10-08

    IPC分类号: H03F3/16 H01F5/00

    摘要: A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.

    摘要翻译: 公开了三维片上电感器,变压器和射频放大器。 射频放大器包括一对变压器和晶体管。 变压器包括至少两个电感耦合电感器。 电感器包括第一金属层的多个段,第二金属层的多个段,第一电感器输入端,第二电感器输入端和耦合第一金属层的多个段的多个穿通硅通孔 以及第二金属层的多个段,以在第一电感器输入端和第二电感器输入端之间形成连续的,不相交的路径。 电感器可以具有对称或不对称的几何形状。 第一金属层可以是芯片的后端部分中的金属层。 第二金属层可以位于芯片的再分布设计层中。

    Three dimensional inductor and transformer
    6.
    发明授权
    Three dimensional inductor and transformer 有权
    三维电感和变压器

    公开(公告)号:US08143952B2

    公开(公告)日:2012-03-27

    申请号:US12576033

    申请日:2009-10-08

    IPC分类号: H03F3/14

    摘要: A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.

    摘要翻译: 公开了三维片上电感器,变压器和射频放大器。 射频放大器包括一对变压器和晶体管。 变压器包括至少两个电感耦合电感器。 电感器包括第一金属层的多个段,第二金属层的多个段,第一电感器输入端,第二电感器输入端和耦合第一金属层的多个段的多个穿通硅通孔 以及第二金属层的多个段,以在第一电感器输入端和第二电感器输入端之间形成连续的,不相交的路径。 电感器可以具有对称或不对称的几何形状。 第一金属层可以是芯片的后端部分中的金属层。 第二金属层可以位于芯片的再分布设计层中。

    Methods and circuits for optimizing performance and power consumption in a design and circuit employing lower threshold voltage (LVT) devices
    7.
    发明授权
    Methods and circuits for optimizing performance and power consumption in a design and circuit employing lower threshold voltage (LVT) devices 有权
    用于在采用较低阈值电压(LVT)器件的设计和电路中优化性能和功耗的方法和电路

    公开(公告)号:US08924902B2

    公开(公告)日:2014-12-30

    申请号:US12683075

    申请日:2010-01-06

    申请人: Lew G. Chua-Eoan

    发明人: Lew G. Chua-Eoan

    IPC分类号: G06F17/50

    摘要: Methods and circuits for optimizing performance and power consumption in a circuit design and circuit employing one or more lower threshold voltage (Lvt) cells or devices are described. A base supply voltage amplitude is determined for providing operating power for the circuit. The base supply voltage amplitude is a low or lowest voltage level that still satisfies a performance specification for the circuit. Providing a low or lowest base supply voltage level reduces or minimizes the standby (i.e., non-switching) power consumption in the Lvt device(s) since current leakage is reduced as the supply voltage level is reduced. Reducing the supply voltage level used to power the Lvt device(s) also reduces active power consumption for the circuit as well. Thus, total power consumption is optimized or reduced while still receiving the benefit of using Lvt devices to optimize or increase performance of a circuit layout and circuit.

    摘要翻译: 描述了在采用一个或多个下阈值电压(Lvt)单元或设备的电路设计和电路中优化性能和功耗的方法和电路。 确定基本电源电压幅度以提供电路的工作功率。 基本电源电压幅度是仍然满足电路性能规格的低或最低电压电平。 提供低或最低基准电压电平降低或最小化Lvt装置中的待机(即非切换)功率消耗,因为随着电源电压电平的降低,电流泄漏减小。 降低用于为Lvt设备供电的电源电压也可以降低电路的有功功耗。 因此,总功耗被优化或降低,同时仍然受益于使用Lvt设备来优化或增加电路布局和电路的性能的益处。

    Low Voltage Temperature Sensor and use Thereof for Autonomous Multiprobe Measurement Device
    8.
    发明申请
    Low Voltage Temperature Sensor and use Thereof for Autonomous Multiprobe Measurement Device 有权
    低电压温度传感器及其自动多点测量装置的使用

    公开(公告)号:US20110234300A1

    公开(公告)日:2011-09-29

    申请号:US12731455

    申请日:2010-03-25

    IPC分类号: G01K7/01

    CPC分类号: G01K7/01 G01K2215/00 G05F3/30

    摘要: A bandgap sensor which measures temperatures within an integrated circuit is presented. The sensor may include a first transistor having an emitter node coupled in series to a first resistor and a first current source, wherein a PTAT current flows through the first resistor, and a second transistor having a base node coupled to a base node of the first transistor, and a collector node coupled to a collector node of the first transistor, further wherein the first and second transistors are diode connected. The sensor may further include a first operational amplifier providing negative feedback to the first current source, wherein the negative feedback is related to a difference in the base-emitter voltages of the first and second transistors, and a second operational amplifier which couples the base-emitter voltage of the second transistor across a second resistor, wherein a CTAT current flows through the second resistor.

    摘要翻译: 提出了一种测量集成电路内温度的带隙传感器。 传感器可以包括具有与第一电阻器和第一电流源串联耦合的发射极节点的第一晶体管,其中PTAT电流流过第一电阻器,以及第二晶体管,具有耦合到第一电阻器的基极节点的基极节点 晶体管和耦合到第一晶体管的集电极节点的集电极节点,其中第一和第二晶体管是二极管连接的。 传感器还可以包括向第一电流源提供负反馈的第一运算放大器,其中所述负反馈与所述第一和第二晶体管的基极 - 发射极电压的差异相关;以及第二运算放大器, 跨越第二电阻器的第二晶体管的发射极电压,其中CTAT电流流过第二电阻器。

    Method and apparatus for tightly coupled, low power image processing
    9.
    发明授权
    Method and apparatus for tightly coupled, low power image processing 有权
    用于紧耦合,低功率图像处理的方法和装置

    公开(公告)号:US09001267B2

    公开(公告)日:2015-04-07

    申请号:US13294681

    申请日:2011-11-11

    摘要: An image divided into N pixel blocks, stored block wise in a camera core and transferred block wise from the camera core to a downstream processing engine local to the local memory. A direct handshaking is communicated, between the camera core and the downstream processing engine, in the block wise transfers. Optionally an optical sensor scanner divides the image with a scan rate N times a frame rate, each scan providing a block of the frame. Optionally, the block wise transfer includes a transfer through a local memory, local to the camera core, controlled by the direct handshaking.

    摘要翻译: 将图像划分为N个像素块,以相机核心方式存储并从相机内核块传输到本地存储器本地的下游处理引擎。 在相机芯和下游处理引擎之间,在块传输中进行直接握手。 可选地,光学传感器扫描器以N倍于帧速率的扫描速率分割图像,每次扫描提供帧的块。 可选地,块传输包括通过本地存储器传输,通过直接握手控制的本地到摄像机核心。

    On-chip low voltage capacitor-less low dropout regulator with Q-control
    10.
    发明授权
    On-chip low voltage capacitor-less low dropout regulator with Q-control 有权
    具有Q控制功能的片上低电压无电容低压差稳压器

    公开(公告)号:US08872492B2

    公开(公告)日:2014-10-28

    申请号:US13091715

    申请日:2011-04-21

    IPC分类号: G05F1/40 G05F1/575

    CPC分类号: G05F1/575

    摘要: Systems and method for a capacitor-less Low Dropout (LDO) voltage regulator. An error amplifier is configured to amplify a differential between a reference voltage and a regulated LDO voltage. Without including an external capacitor in the LDO voltage regulator, a Miller amplifier is coupled to an output of the error amplifier, wherein the Miller amplifier is configured to amplify a Miller capacitance formed at an input node of the Miller amplifier. A capacitor coupled to the output of the error amplifier creates a positive feedback loop for decreasing a quality factor (Q), such that system stability is improved.

    摘要翻译: 无电容低压差(LDO)稳压器的系统和方法。 误差放大器被配置为放大参考电压和调节LDO电压之间的差分。 在LDO稳压器中不包括外部电容器的情况下,米勒放大器耦合到误差放大器的输出端,其中,米勒放大器被配置为放大在米勒放大器的输入节点处形成的米勒电容。 耦合到误差放大器的输出的电容器产生用于降低质量因子(Q)的正反馈回路,从而提高系统稳定性。