-
公开(公告)号:US08179704B2
公开(公告)日:2012-05-15
申请号:US12583349
申请日:2009-08-18
IPC: H02H7/125
CPC classification number: H05B33/0809 , H05B33/089 , Y02B20/341 , Y10S323/908
Abstract: An electronic device includes a circuit protection unit providing over-current protection to a main circuit and including a series connection of first and second current limiting circuits, and a normally-open branch circuit coupled in parallel to the first current limiting circuit and operable to conduct when a voltage across the first current limiting circuit reaches a first predetermined threshold voltage not greater than an endure voltage of the first current limiting circuit. Prior to conduction of the branch circuit, the first current limiting circuit maintains a current flowing therethrough at a first limit value when a current flowing through the main circuit reaches the first limit value. Upon conduction of the branch circuit, the second current limiting circuit maintains a current flowing therethrough at a second limit value greater than the first limit value when the current flowing through the main circuit reaches the second limit value.
Abstract translation: 电子设备包括电路保护单元,其向主电路提供过电流保护,并且包括第一和第二限流电路的串联连接以及与第一限流电路并联耦合的常开支路,并且可操作地导通 当第一限流电路两端的电压达到不大于第一限流电路的耐受电压的第一预定阈值电压时。 在分支电路导通之前,当流经主电路的电流达到第一极限值时,第一限流电路将流过其中的电流保持在第一极限值。 在分支电路导通时,当流过主电路的电流达到第二极限值时,第二限流电路保持流过其中的电流,大于第一极限值的第二极限值。
-
公开(公告)号:US20100165677A1
公开(公告)日:2010-07-01
申请号:US12583349
申请日:2009-08-18
IPC: H02H9/02
CPC classification number: H05B33/0809 , H05B33/089 , Y02B20/341 , Y10S323/908
Abstract: An electronic device includes a circuit protection unit providing over-current protection to a main circuit and including a series connection of first and second current limiting circuits, and a normally-open branch circuit coupled in parallel to the first current limiting circuit and operable to conduct when a voltage across the first current limiting circuit reaches a first predetermined threshold voltage not greater than an endure voltage of the first current limiting circuit. Prior to conduction of the branch circuit, the first current limiting circuit maintains a current flowing therethrough at a first limit value when a current flowing through the main circuit reaches the first limit value. Upon conduction of the branch circuit, the second current limiting circuit maintains a current flowing therethrough at a second limit value greater than the first limit value when the current flowing through the main circuit reaches the second limit value.
Abstract translation: 电子设备包括电路保护单元,其向主电路提供过电流保护,并且包括第一和第二限流电路的串联连接以及与第一限流电路并联耦合的常开支路,并且可操作地导通 当第一限流电路两端的电压达到不大于第一限流电路的耐受电压的第一预定阈值电压时。 在分支电路导通之前,当流经主电路的电流达到第一极限值时,第一限流电路将流过其中的电流保持在第一极限值。 在分支电路导通时,当流过主电路的电流达到第二极限值时,第二限流电路保持流过其中的电流,大于第一极限值的第二极限值。
-
公开(公告)号:US20140252118A1
公开(公告)日:2014-09-11
申请号:US13904013
申请日:2013-05-28
Applicant: Tai-Cheng Tsai , Gwo-Jiun Sheu , Chin-Hua Hung , Po-Jen Su
Inventor: Tai-Cheng Tsai , Gwo-Jiun Sheu , Chin-Hua Hung , Po-Jen Su
IPC: B05B12/00
CPC classification number: B05B12/084 , B05B12/008 , B05B12/12 , B05B15/555 , B05D1/02
Abstract: A spray coating apparatus including a containing tank, a spray nozzle, and a detection unit is provided. The containing tank contains a glue. The spray nozzle is connected to the containing tank to spray and coat the glue on a work piece. The detection unit detects specification data of the glue on the work piece.
Abstract translation: 提供了包括容纳罐,喷嘴和检测单元的喷涂设备。 容纳罐含有胶水。 喷嘴连接到容纳罐上以喷涂和涂抹在工件上。 检测单元检测工件上的胶水的规格数据。
-
公开(公告)号:US20130146912A1
公开(公告)日:2013-06-13
申请号:US13670412
申请日:2012-11-06
Applicant: Po-Jen Su , Yun-Li Li , Cheng-Yen Chen , Gwo-Jiun Sheu
Inventor: Po-Jen Su , Yun-Li Li , Cheng-Yen Chen , Gwo-Jiun Sheu
IPC: H01L33/60
CPC classification number: H01L33/641 , H01L23/3677 , H01L33/46 , H01L33/486 , H01L33/62 , H01L33/642 , H01L33/647 , H01L2924/0002 , H01L2924/00
Abstract: An electronic device including an insulating substrate, a plurality of conductive vias and a chip is provided. The insulating substrate has an upper surface and a lower surface opposite to each other. The conductive vias pass through the insulating substrate. The chip is disposed on the upper surface of the insulating substrate and includes a chip substrate, a semiconductor layer and a plurality of contacts. The semiconductor layer is located between the chip substrate and the contacts. The contacts are electrically connected to the conductive vias. The material of the insulating substrate and the material of the chip substrate are the same.
Abstract translation: 提供了包括绝缘基板,多个导电通孔和芯片的电子设备。 绝缘基板具有彼此相对的上表面和下表面。 导电通孔穿过绝缘基板。 芯片设置在绝缘基板的上表面上,并且包括芯片基板,半导体层和多个触点。 半导体层位于芯片基板和触点之间。 触点电连接到导电通孔。 绝缘基板的材料和芯片基板的材料相同。
-
公开(公告)号:US08748925B2
公开(公告)日:2014-06-10
申请号:US13562281
申请日:2012-07-30
IPC: H01L33/00
CPC classification number: H01L33/60 , H01L24/73 , H01L33/62 , H01L2224/1403 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/49107 , H01L2224/73265 , H01L2924/01322 , H01L2933/0066 , H05K3/3431 , H05K2201/10106 , H05K2201/2054 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: A plate including a substrate, a metal reflection layer and an oxidation protection layer is provided. The substrate has a first surface and a second surface opposite to the first surface. The metal reflection layer is disposed on the first surface of the substrate. The oxidation protection layer covers the metal reflection layer. The metal reflection layer is disposed between the oxidation protection layer and the first surface of the substrate. At least one light emitting diode chip is adapted to eutectic bonding on the plate.
Abstract translation: 提供了包括基板,金属反射层和氧化保护层的板。 基板具有与第一表面相对的第一表面和第二表面。 金属反射层设置在基板的第一表面上。 氧化保护层覆盖金属反射层。 金属反射层设置在氧化保护层和基板的第一表面之间。 至少一个发光二极管芯片适于在板上共晶接合。
-
公开(公告)号:US20130056776A1
公开(公告)日:2013-03-07
申请号:US13562281
申请日:2012-07-30
IPC: H01L33/60
CPC classification number: H01L33/60 , H01L24/73 , H01L33/62 , H01L2224/1403 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/49107 , H01L2224/73265 , H01L2924/01322 , H01L2933/0066 , H05K3/3431 , H05K2201/10106 , H05K2201/2054 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: A plate including a substrate, a metal reflection layer and an oxidation protection layer is provided. The substrate has a first surface and a second surface opposite to the first surface. The metal reflection layer is disposed on the first surface of the substrate. The oxidation protection layer covers the metal reflection layer. The metal reflection layer is disposed between the oxidation protection layer and the first surface of the substrate. At least one light emitting diode chip is adapted to eutectic bonding on the plate.
Abstract translation: 提供了包括基板,金属反射层和氧化保护层的板。 基板具有与第一表面相对的第一表面和第二表面。 金属反射层设置在基板的第一表面上。 氧化保护层覆盖金属反射层。 金属反射层设置在氧化保护层和基板的第一表面之间。 至少一个发光二极管芯片适于在板上共晶接合。
-
公开(公告)号:US09035335B2
公开(公告)日:2015-05-19
申请号:US13798126
申请日:2013-03-13
Applicant: Sheng-Yuan Sun , Po-Jen Su
Inventor: Sheng-Yuan Sun , Po-Jen Su
IPC: H01L27/15 , H01L25/075 , H01L33/20 , H01L33/50
CPC classification number: F21K9/64 , F21V9/30 , F21V13/02 , F21V19/0025 , F21Y2101/00 , F21Y2113/10 , F21Y2115/10 , H01L25/0753 , H01L27/15 , H01L33/20 , H01L33/50 , H01L2924/0002 , H01L2924/00
Abstract: A light emitting module including a substrate, a plurality of first light emitting diode (LED) chips and a plurality of second LED chips is provided. The substrate has a cross-shaped central region and a peripheral region surrounding the cross-shaped central region. The first LED chips are disposed on the substrate and at least located in the cross-shaped central region. The second LED chips are disposed on the substrate and at least located in the peripheral region. A size of each second LED chip is smaller than a size of each first LED chip. The number of the first LED chips located in the peripheral region is smaller than that in the cross-shaped central region. The number of the second LED chips located in the cross-shaped central region is smaller than that in the peripheral region.
Abstract translation: 提供了包括基板,多个第一发光二极管(LED)芯片和多个第二LED芯片的发光模块。 衬底具有十字形中心区域和围绕十字形中心区域的周边区域。 第一LED芯片设置在基板上并且至少位于十字形中心区域中。 第二LED芯片设置在基板上并且至少位于周边区域中。 每个第二LED芯片的尺寸小于每个第一LED芯片的尺寸。 位于周边区域的第一LED芯片的数量小于十字形中心区域中的数量。 位于十字形中心区域的第二LED芯片的数量小于周边区域中的第二LED芯片的数量。
-
公开(公告)号:US20140319562A1
公开(公告)日:2014-10-30
申请号:US14096009
申请日:2013-12-04
CPC classification number: H01L33/58 , H01L33/54 , H01L33/56 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014
Abstract: An LED package structure of the invention includes a light-emitting device and a transparent molding compound. The light-emitting device has an upper surface. The transparent molding compound is disposed on the light-emitting device and covers the upper surface, in which the transparent molding compound has a top surface and a bottom surface opposite to each other and a first outside surface connecting the top surface and the bottom surface. A surface area of the first outside surface is greater than or equal to four times of a horizontal projection area of the upper surface.
Abstract translation: 本发明的LED封装结构包括发光器件和透明模塑料。 发光装置具有上表面。 透明模塑料设置在发光装置上并且覆盖透明模塑料具有彼此相对的顶表面和底表面的上表面和连接顶表面和底表面的第一外表面。 第一外表面的表面积大于或等于上表面的水平投影面积的四倍。
-
公开(公告)号:US08587013B2
公开(公告)日:2013-11-19
申请号:US13670438
申请日:2012-11-06
Applicant: Po-Jen Su , Chih-Ling Wu , Yi-Ru Huang , Yi-Ju Shih
Inventor: Po-Jen Su , Chih-Ling Wu , Yi-Ru Huang , Yi-Ju Shih
IPC: H01L33/00
CPC classification number: H01L33/62 , H01L33/46 , H01L2224/48091 , H01L2924/00014
Abstract: A semiconductor package structure includes an insulating substrate, a patterned conductive layer, a light emitting diode (LED) chip and a conductive connection part. The insulating substrate has an upper surface divided into an element configuration region and an element bonding region. The patterned conductive layer includes plural circuits located in the element configuration region and at least one bonding pad located in the element bonding region. The LED chip is flip chip bonded on the patterned conductive layer and electrically connected to the circuits. The conductive connection part has a first end point electrically connected to the bonding pad and a second end point electrically connected to an external circuit. The bonding pad and a corner of the LED chip are disposed correspondingly. A horizontal distance between an apex of the corner and the first end point of the conductive connection part is greater than or equal to 30 micrometers.
Abstract translation: 半导体封装结构包括绝缘衬底,图案化导电层,发光二极管(LED)芯片和导电连接部分。 绝缘基板具有分为元件配置区域和元件接合区域的上表面。 图案化导电层包括位于元件配置区域中的多个电路和位于元件接合区域中的至少一个焊盘。 LED芯片在图案化的导电层上被倒装芯片接合并电连接到电路。 导电连接部分具有电连接到焊盘的第一端点和电连接到外部电路的第二端点。 接合焊盘和LED芯片的角部相应地设置。 角的顶点与导电连接部的第一端点之间的水平距离大于或等于30微米。
-
公开(公告)号:US20130146913A1
公开(公告)日:2013-06-13
申请号:US13670418
申请日:2012-11-06
Applicant: Po-Jen Su , Yun-Li Li , Cheng-Yen Chen , Gwo-Jiun Sheu
Inventor: Po-Jen Su , Yun-Li Li , Cheng-Yen Chen , Gwo-Jiun Sheu
IPC: H01L33/60
CPC classification number: H01L23/3677 , H01L33/46 , H01L33/62 , H01L33/641 , H01L33/642 , H01L33/647 , H01L2224/16 , H01L2924/19107
Abstract: An electronic device including an insulating substrate, a chip and a patterned conductive layer is provided. The insulating substrate has an upper surface and a lower surface opposite to each other. The chip is disposed above the upper surface of the insulating substrate. The patterned conductive layer is disposed between the upper surface of the insulating substrate and the chip. The chip is electrically connected to an external circuit via the patterned conductive layer. Heat generated by the chip is transferred to external surroundings via the patterned conductive layer and the insulating substrate.
Abstract translation: 提供了包括绝缘基板,芯片和图案化导电层的电子器件。 绝缘基板具有彼此相对的上表面和下表面。 芯片设置在绝缘基板的上表面之上。 图案化导电层设置在绝缘基板的上表面和芯片之间。 芯片通过图案化的导电层电连接到外部电路。 由芯片产生的热量经由图案化的导电层和绝缘基板转移到外部环境。
-
-
-
-
-
-
-
-
-