公开(公告)号：US08436349B2

公开(公告)日：2013-05-07

申请号：US12524138

申请日：2008-02-18

申请人： Masafumi Sano ,  Ryo Hayashi

发明人： Masafumi Sano ,  Ryo Hayashi

IPC分类号： H01L29/10

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： In a process for fabricating a thin-film transistor in which a gate electrode 4 is to be formed on a substrate 1, the process has the steps of forming the gate electrode 4 on the substrate 1, forming a metal oxide layer 7 in such a way as to cover the gate electrode 4, forming a source electrode 6 and a drain electrode 5, and carrying out annealing in an inert gas to change part of the metal oxide layer 7 into a channel region.

摘要翻译： 在基板1上形成栅电极4的薄膜晶体管的制造工序中，具有如下步骤：在基板1上形成栅电极4，在该基板1上形成金属氧化物层7 以覆盖栅电极4的方式形成源电极6和漏电极5，并且在惰性气体中进行退火以将金属氧化物层7的一部分改变为沟道区。

公开(公告)号：US20110065269A1

公开(公告)日：2011-03-17

申请号：US12949389

申请日：2010-11-18

申请人： Ryo Hayashi ,  Masafumi Sano

发明人： Ryo Hayashi ,  Masafumi Sano

IPC分类号： H01L21/265

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： In an electron device in which plural thin film transistors each having at least a source electrode, a drain electrode, a semiconductor region including a channel, a gate insulation film and a gate electrode are provided on a substrate, a device separation region provided between the plural thin film transistors and the semiconductor region are constituted by a same metal oxide layer, and resistance of the semiconductor region is formed to be lower than resistance of the device separation region.

摘要翻译： 在基板上设置有至少具有源电极，漏电极，包括沟道的半导体区域，栅极绝缘膜和栅极电极的多个薄膜晶体管的电子器件，设置在基板之间的器件分离区域 多个薄膜晶体管和半导体区域由相同的金属氧化物层构成，半导体区域的电阻形成为低于器件分离区域的电阻。

公开(公告)号：US20100059751A1

公开(公告)日：2010-03-11

申请号：US12596059

申请日：2008-04-16

申请人： Kenji Takahashi ,  Ryo Hayashi ,  Masafumi Sano

发明人： Kenji Takahashi ,  Ryo Hayashi ,  Masafumi Sano

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/4908 ,  H01L29/7869

摘要： A bottom gate type thin-film transistor constituted of at least a substrate, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode. At an interface between the gate electrode and the gate insulating layer, the interface has a difference between hill tops and dale bottoms of unevenness in the vertical direction, of 30 nm or less.

摘要翻译： 至少由基板，栅极，栅极绝缘层，半导体层，源电极和漏极构成的底栅型薄膜晶体管。 在栅电极和栅极绝缘层之间的界面处，界面在垂直方向上的不平坦度的山顶和垂直底部之间的差为30nm以下。

公开(公告)号：US20090072232A1

公开(公告)日：2009-03-19

申请号：US12281783

申请日：2007-02-23

申请人： Ryo Hayashi ,  Katsumi Abe ,  Masafumi Sano

发明人： Ryo Hayashi ,  Katsumi Abe ,  Masafumi Sano

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L21/02422 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/28202 ,  H01L29/4908 ,  H01L29/518 ,  H01L29/66969

摘要： The thin-film transistor of the present invention has at least a semiconductor layer including: on a substrate, a source electrode, a drain electrode, and a channel region; a gate insulating film; and a gate electrode, wherein the semiconductor layer is an oxide semiconductor layer, and wherein the gate insulating film is amorphous silicon including at least O and N, and the gate insulating film has a distribution of an oxygen concentration in a thickness direction so that the oxygen concentration is high in the side of an interface with an oxide semiconductor layer and the oxygen concentration decreases toward the side of the gate electrode.

摘要翻译： 本发明的薄膜晶体管至少具有半导体层，该半导体层包括：基板，源电极，漏电极和沟道区; 栅极绝缘膜; 以及栅电极，其中所述半导体层是氧化物半导体层，并且其中所述栅极绝缘膜是至少包括至少O和N的非晶硅，并且所述栅极绝缘膜具有在厚度方向上的氧浓度的分布，使得 在与氧化物半导体层的界面侧的氧浓度高，并且氧浓度朝向栅电极侧减小。

公开(公告)号：US06365308B1

公开(公告)日：2002-04-02

申请号：US08967208

申请日：1997-10-29

申请人： Satoshi Kojima ,  Keishi Saito ,  Hirokazu Ohtoshi ,  Masafumi Sano ,  Junichiro Hashizume ,  Yasuyoshi Takai ,  Ryo Hayashi ,  Masahiko Tonogaki

发明人： Satoshi Kojima ,  Keishi Saito ,  Hirokazu Ohtoshi ,  Masafumi Sano ,  Junichiro Hashizume ,  Yasuyoshi Takai ,  Ryo Hayashi ,  Masahiko Tonogaki

IPC分类号： G03G5043

CPC分类号： G03G5/08285 ,  G03G5/0433 ,  G03G5/08214 ,  G03G5/08221 ,  G03G5/14704

摘要： In order to maintain excellent electrical, optical and photoconductive characteristics and to significantly improve the durability under adverse environments, a light receiving member for electrophotography according to the present invention comprises in sequence: a supporting member and a light receiving layer; said light receiving layer comprising in sequence at least a photoconductive layer and a surface layer thereon, said photoconductive layer comprising a non-single-crystal material containing silicon atoms as a matrix, and said surface layer comprising an amorphous material containing silicon atoms and carbon atoms as a matrix, wherein the carbon atoms are at least diamond-bonded and graphite-bonded, and wherein from 2% to 30% by number of the carbon atoms are graphite-bonded.

摘要翻译： 为了保持优异的电气，光学和光导特性并显着改善不利环境下的耐久性，根据本发明的用于电子照相的光接收元件依次包括支撑元件和光接收层; 所述光接收层依次包括至少一个光电导层和其上的表面层，所述光电导层包括含有硅原子作为基质的非单晶材料，所述表面层包含含有硅原子和碳原子的无定形材料 作为基质，其中碳原子至少是金刚石键合和石墨键合的，并且其中2〜30％的碳原子是石墨键合的。

公开(公告)号：US20110092016A1

公开(公告)日：2011-04-21

申请号：US12865032

申请日：2009-03-02

申请人： Masato Ofuji ,  Katsumi Abe ,  Hisae Shimizu ,  Ryo Hayashi ,  Masafumi Sano ,  Hideya Kumomi ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko

发明人： Masato Ofuji ,  Katsumi Abe ,  Hisae Shimizu ,  Ryo Hayashi ,  Masafumi Sano ,  Hideya Kumomi ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko

IPC分类号： H01L21/26 ,  H01L21/34

CPC分类号： H01L29/7869 ,  H01L29/66969 ,  H01L29/78633

摘要： In a method of treating a semiconductor element which at least includes a semiconductor, a threshold voltage of the semiconductor element is changed by irradiating the semiconductor with light with a wavelength longer than an absorption edge wavelength of the semiconductor. The areal density of in-gap states in the semiconductor is 1013 cm−2eV−1 or less. The band gap may be 2 eV or greater. The semiconductor may include at least one selected from the group consisting of In, Ga, Zn and Sn. The semiconductor may be one selected from the group consisting of amorphous In—Ga—Zn—O (IGZO), amorphous In—Zn—O (IZO) and amorphous Zn—Sn—O (ZTO). The light irradiation may induce the threshold voltage shift in the semiconductor element, the shift being of the opposite sign to the threshold voltage shift caused by manufacturing process history, time-dependent change, electrical stress or thermal stress.

摘要翻译： 在处理至少包括半导体的半导体元件的方法中，通过用比半导体的吸收边缘波长更长的光照射半导体来改变半导体元件的阈值电压。 半导体中间隙状态的面密度为1013cm-2eV-1或更小。 带隙可以是2eV或更大。 半导体可以包括选自In，Ga，Zn和Sn中的至少一种。 半导体可以是选自由无定形In-Ga-Zn-O（IGZO），非晶In-Zn-O（IZO）和无定形Zn-Sn-O（ZTO）组成的组中的一种。 光照射可以引起半导体元件中的阈值电压偏移，该偏移与由制造工艺历史，时间依赖变化，电应力或热应力引起的阈值电压偏移相反。

公开(公告)号：US20090021536A1

公开(公告)日：2009-01-22

申请号：US12162929

申请日：2006-03-10

申请人： Katsumi Abe ,  Masafumi Sano ,  Ryo Hayashi ,  Hideya Kumomi

发明人： Katsumi Abe ,  Masafumi Sano ,  Ryo Hayashi ,  Hideya Kumomi

IPC分类号： G09G5/10 ,  G09G3/30

CPC分类号： G09G3/3283 ,  G09G3/2014 ,  G09G3/325 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/066 ,  G09G2320/0238 ,  G09G2320/043

摘要： A new driving circuit is provided. The driving circuit according to the present invention comprises a first period for setting a current to be supplied to a display element, a second period for setting a gray-scale of the display element, and a third period for supplying a driving current to the display element. The present invention, in the driving circuit of the display element, is provided with a current source circuit for supplying a constant current to the display element and a control circuit for controlling the time to supply a constant current to the display element from the current source circuit.

摘要翻译： 提供了新的驱动电路。 根据本发明的驱动电路包括用于设置要提供给显示元件的电流的第一周期，用于设置显示元件的灰度级的第二周期和用于向显示器提供驱动电流的第三周期 元件。 本发明在显示元件的驱动电路中设置有用于向显示元件供给恒定电流的电流源电路和控制电路，用于控制从电流源向显示元件提供恒定电流的时间 电路。

公开(公告)号：US20080291350A1

公开(公告)日：2008-11-27

申请号：US12123103

申请日：2008-05-19

申请人： Ryo Hayashi ,  Masafumi Sano

发明人： Ryo Hayashi ,  Masafumi Sano

IPC分类号： H01L21/00

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： In an electron device in which plural thin film transistors each having at least a source electrode, a drain electrode, a semiconductor region including a channel, a gate insulation film and a gate electrode are provided on a substrate, a device separation region provided between the plural thin film transistors and the semiconductor region are constituted by a same metal oxide layer, and resistance of the semiconductor region is formed to be lower than resistance of the device separation region.

摘要翻译： 在基板上设置有至少具有源电极，漏电极，包括沟道的半导体区域，栅极绝缘膜和栅极电极的多个薄膜晶体管的电子器件，设置在基板之间的器件分离区域 多个薄膜晶体管和半导体区域由相同的金属氧化物层构成，半导体区域的电阻形成为低于器件分离区域的电阻。

公开(公告)号：US06737123B2

公开(公告)日：2004-05-18

申请号：US10166759

申请日：2002-06-12

申请人： Takaharu Kondo ,  Masafumi Sano ,  Akira Sakai ,  Tadashi Sawayama ,  Ryo Hayashi ,  Shuichiro Sugiyama ,  Hiroyuki Ozaki ,  Yoshinori Sugiura

发明人： Takaharu Kondo ,  Masafumi Sano ,  Akira Sakai ,  Tadashi Sawayama ,  Ryo Hayashi ,  Shuichiro Sugiyama ,  Hiroyuki Ozaki ,  Yoshinori Sugiura

IPC分类号： C23C16505

CPC分类号： C23C16/517 ,  H01L21/02422 ,  H01L21/02425 ,  H01L21/02491 ,  H01L21/02505 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L31/02363 ,  H01L31/02366 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A silicon-based film is formed superimposing a direct-current potential on the high-frequency power to set the potential of the high-frequency power feed section to a potential which is lower by V1 than the ground potential; the V1 satisfying |V2|≦|V1|≦50×|V2|, where V2 is the potential difference from the ground potential, produced in the electrode in the state the plasma has taken place under the same conditions except that the direct-current potential is not superposed on the high-frequency power and the electrode is brought into a non-grounded state. This can provide a silicon-based film having superior characteristics at a high film formation rate, and a semiconductor device making use of this silicon-based film, having superior adherence, environmental resistance, and can enjoy a short tact time at the time of manufacture.

摘要翻译： 形成在高频电力上叠加直流电位的硅基膜，将高频供电部的电位设定为比地电位低V1的电位; 满足| V2 | <= | V1 | <= 50x | V2 |的V1，其中V2是在等离子体在相同条件下发生的状态下在电极中产生的与地电位的电位差， 电流电势不叠加在高频电源上，并且电极进入非接地状态。 这可以提供具有高成膜速度的优异特性的硅基膜和使用该硅基膜的半导体器件，具有优异的附着力，耐环境性，并且可以在制造时享受短的时间 。

公开(公告)号：US5563425A

公开(公告)日：1996-10-08

申请号：US149749

申请日：1993-11-10

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Masafumi Sano ,  Mitsuyuki Niwa ,  Ryo Hayashi ,  Masahiko Tonogaki

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Masafumi Sano ,  Mitsuyuki Niwa ,  Ryo Hayashi ,  Masahiko Tonogaki

IPC分类号： H01L31/04 ,  H01L31/052 ,  H01L31/075 ,  H01L31/20 ,  H01L29/04 ,  H01L31/36 ,  H01L31/376

CPC分类号： H01L31/065 ,  H01L31/056 ,  H01L31/075 ,  H01L31/204 ,  Y02E10/52 ,  Y02E10/548 ,  Y02P70/521

摘要： An object of the present invention is to provide a photoelectrical conversion device in which recombination of carriers excited by light is prevented and the open voltage and the carrier range of positive holes are improved and to provide a generating system using the photoelectrical conversion device. The photoelectrical conversion device includes a p-layer, an i-layer, and an n-layer, wherein the photoelectrical conversion device being formed by stacking the p-layer, the i-layer and the n-layer each of which is made of non-single-crystal silicon semiconductor, the i-layer contains germanium atoms, the band gap of the i-layer is smoothly changed in a direction of the thickness of the i-layer, the minimum value of the band gap is positioned adjacent to the p-layer from the central position of the i-layer and both of a valence control agent to serve as a donor and another valence control agent to serve as an acceptor are doped into the i-layer. Further, at least either of the p-layer or the n-layer is formed into a stacked structure consisting of a layer mainly composed of group III elements of the periodic table and/or group V elements of the same and a layer containing the valence control agent and mainly composed of silicon atoms.

摘要翻译： 本发明的目的是提供一种光电转换装置，其中防止由光激发的载流子的复合，并且改善了空穴的开路电压和载流子范围，并提供了使用光电转换装置的发电系统。 所述光电转换装置包括p层，i层和n层，其中所述光电转换装置通过层叠p层，i层和n层而形成，所述p层，i层和n层由 非单晶硅半导体，i层含有锗原子，i层的带隙在i层的厚度方向上平滑地变化，带隙的最小值位于 i层的中心位置的p层和作为供体的价电子控制剂以及用作受体的另一价电子控制剂都掺杂到i层中。 此外，p层或n层中的至少任一层形成为由主要由周期表的III族元素和/或其V族元素组成的层和包含该价电子层的层 控制剂主要由硅原子组成。