MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20190019624A1

    公开(公告)日:2019-01-17

    申请号:US15975198

    申请日:2018-05-09

    摘要: A multilayer ceramic capacitor includes a body having a dielectric layer and internal electrodes disposed to be alternately exposed to the third and fourth surfaces with the dielectric layer interposed therebetween. External electrodes include connection parts respectively formed on opposing surfaces of the body, band parts formed to extend from the connection parts to portions of side surfaces of the body, and corner parts in which the connection parts and the band parts are contiguous. A thickness of each of the external electrodes may be 50 nm to 2 μm. The external electrodes may be formed using a barrel-type sputtering method. A ratio t2/t1 may satisfy 0.7 to 1.2, where t1 is a thickness of each connection part and t2 is a thickness of each band part. A ratio t3/t1 may satisfy 0.7 to 1.0, where t3 is a thickness of each corner part.

    SILICON SUBSTRATE AND METHOD OF FABRICATING THE SAME
    2.
    发明申请
    SILICON SUBSTRATE AND METHOD OF FABRICATING THE SAME 审中-公开
    硅基材及其制造方法

    公开(公告)号:US20140042586A1

    公开(公告)日:2014-02-13

    申请号:US13673115

    申请日:2012-11-09

    IPC分类号: H01L29/16 H01L21/762

    CPC分类号: H01L21/78 H01L21/2007

    摘要: There are provided a silicon substrate and a method of fabricating the same, the silicon substrate including: first and second silicon substrates having corresponding bonding surfaces; a silicon oxide film formed between the first and second silicon substrates and having at least one trench communicating with the outside; and a hermetic portion formed on an end portion of the trench according to oxidation of the silicon oxide film.

    摘要翻译: 提供硅衬底及其制造方法,所述硅衬底包括:具有相应接合表面的第一和第二硅衬底; 形成在所述第一和第二硅衬底之间并且具有与外部连通的至少一个沟槽的氧化硅膜; 以及根据氧化硅膜的氧化形成在沟槽的端部上的密封部分。

    CAPACITOR COMPONENT
    4.
    发明申请
    CAPACITOR COMPONENT 审中-公开

    公开(公告)号:US20190385795A1

    公开(公告)日:2019-12-19

    申请号:US16291053

    申请日:2019-03-04

    IPC分类号: H01G4/224 H01G4/232 H01G4/30

    摘要: A capacitor component includes a humidity resistant layer formed on a portion of the external surface of a body on which an external electrode is not formed, and further includes a humidity resistant layer disposed inside the external electrode, to improve humidity resistance reliability. The capacitor component includes an opening portion formed by removing a portion of the humidity resistant layer disposed inside the external electrode to improve electrical connection.

    CAPACITOR AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    CAPACITOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
    电容器及其制造方法

    公开(公告)号:US20140092524A1

    公开(公告)日:2014-04-03

    申请号:US13735614

    申请日:2013-01-07

    IPC分类号: H01G4/01 H01G4/008 H01G4/06

    摘要: There is provided a capacitor, including: a substrate part including a first substrate having a groove portion and a second substrate positioned above the first substrate and having a protrusion portion; a first capacitance part formed on one surface of the first substrate and having a shape corresponding to that of the groove portion; and a second capacitance part formed on one surface of the second substrate and having a shape corresponding to that of the protrusion portion.

    摘要翻译: 提供了一种电容器,包括:基板部分,包括具有凹槽部分的第一基板和位于第一基板上方并具有突出部分的第二基板; 第一电容部,形成在所述第一基板的一个表面上,并且具有与所述槽部的形状对应的形状; 以及形成在所述第二基板的一个表面上并且具有与所述突出部的形状相对应的形状的第二电容部。

    MULTILAYER ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20190103224A1

    公开(公告)日:2019-04-04

    申请号:US16044898

    申请日:2018-07-25

    IPC分类号: H01G4/30 H01G4/005 H01G4/12

    摘要: A multilayer electronic component for enhancing damp proof reliability includes: a capacitor body including a plurality of dielectric layers, and first and second internal electrodes, alternately disposed across the dielectric layers to expose one end of the first and second electrodes through third and fourth surfaces of the capacitor body; first and second conductive layers disposed on the third and fourth surfaces of the capacitor body and connected to the first and second internal electrodes, respectively; first and second plating layers covering surfaces of the first and second conductive layers; and a plurality of coating layers configured in a multilayer structure on a surface of the capacitor body to expose the first and second plating layers and having an entire thickness of 10 nm to 200 nm.