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公开(公告)号：US20140182915A1
公开(公告)日：2014-07-03
申请号：US14060345
申请日：2013-10-22
发明人： Sung HAN , Young Do KWEON , Jin Gu KIM , Hyung Jin JEON , Yoon Su KIM
CPC分类号： H05K1/116 , H05K1/113 , H05K3/0017 , H05K3/002 , H05K3/421 , H05K2201/0195 , H05K2201/09563 , H05K2201/09854 , H05K2203/0733
摘要： The present invention relates to a circuit board. A circuit board in accordance with an embodiment of the present invention includes a base substrate; an interlayer insulating layer covering the base substrate; a via structure passing through at least the interlayer insulating layer of the base substrate and the interlayer insulating layer in the vertical direction; and an etch stop pattern disposed on the interlayer insulating layer in the horizontal direction to surround the via structure and made of an insulating material.
摘要翻译： 本发明涉及一种电路板。 根据本发明实施例的电路板包括：基底; 覆盖基底的层间绝缘层; 通孔结构至少穿过基底衬底的层间绝缘层和层间绝缘层在垂直方向上; 以及在水平方向上设置在层间绝缘层上以围绕通孔结构并由绝缘材料制成的蚀刻停止图案。
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公开(公告)号：US20180233433A1
公开(公告)日：2018-08-16
申请号：US15948535
申请日：2018-04-09
发明人： Yoon Su KIM , Seung Min BAEK , Young Gwan KO
IPC分类号： H01L23/485 , H01L23/498 , H01L23/00 , H01L21/48 , H01L23/482 , H01L25/10
CPC分类号： H01L23/485 , H01L21/4857 , H01L21/486 , H01L23/3128 , H01L23/4827 , H01L23/49816 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L25/105 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2924/18162 , H01L2924/3025 , H01L2924/37001 , H01L2924/014 , H01L2924/00014
摘要： A fan-out semiconductor package includes a semiconductor chip including a body and an electrode pad disposed on the body, a metal layer disposed on the electrode pad of the semiconductor chip, and a interconnection member including an insulating layer disposed on one side of the semiconductor chip, a via hole penetrating through the insulating layer and exposing at least a portion of a surface of the metal layer, a seed layer disposed on the surface of the metal layer exposed by the via hole and a wall of the via hole, and a conductor layer disposed on the seed layer.
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公开(公告)号：US20170154838A1
公开(公告)日：2017-06-01
申请号：US15335120
申请日：2016-10-26
发明人： Yoon Su KIM , Seung Min BAEK , Young Gwan KO
IPC分类号： H01L23/485 , H01L23/498 , H01L21/48 , H01L23/482
CPC分类号： H01L23/485 , H01L21/4857 , H01L21/486 , H01L23/3128 , H01L23/4827 , H01L23/49816 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L25/105 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2924/18162 , H01L2924/3025 , H01L2924/37001 , H01L2924/014 , H01L2924/00014
摘要： A fan-out semiconductor package includes a semiconductor chip including a body and an electrode pad disposed on the body, a metal layer disposed on the electrode pad of the semiconductor chip, and a interconnection member including an insulating layer disposed on one side of the semiconductor chip, a via hole penetrating through the insulating layer and exposing at least a portion of a surface of the metal layer, a seed layer disposed on the surface of the metal layer exposed by the via hole and a wall of the via hole, and a conductor layer disposed on the seed layer.
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公开(公告)号：US20150334832A1
公开(公告)日：2015-11-19
申请号：US14598595
申请日：2015-01-16
发明人： Seung Min BAEK , Yoon Su KIM , Jin Hyuck YANG , Chang Bae LEE
CPC分类号： H05K1/111 , H05K3/108 , H05K3/188 , H05K3/388 , H05K3/4007 , H05K2201/0341 , H05K2201/09381 , H05K2203/0713 , H05K2203/0716 , H05K2203/0723 , H05K2203/1407 , Y10T428/12396
摘要： The present invention relates to an electrode structure which includes: a base substrate; a seed layer provided on one or both surfaces of the base substrate; an electroplating layer provided on the seed layer; and barriers discontinuously provided between the seed layer and the electroplating layer.
摘要翻译： 本发明涉及电极结构，其包括：基底; 种子层，设置在所述基底基板的一个或两个表面上; 设置在种子层上的电镀层; 并且在种子层和电镀层之间不连续地提供阻挡层。
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