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公开(公告)号:US20200373244A1
公开(公告)日:2020-11-26
申请号:US16556816
申请日:2019-08-30
发明人: Myung Sam KANG , Yong Koon LEE , Young Gwan KO , Young Chan KO , Moon Il KIM
IPC分类号: H01L23/538 , H01L23/66 , H01L23/31 , H01L23/367 , H01L23/00 , H01L21/48 , H01L21/56 , H01Q1/38
摘要: A semiconductor package includes a frame having first and second through-portions, first and second semiconductor chips, respectively in the first and second through-portions, each having a first surface, on which a connection pad is disposed, a first encapsulant covering at least a portion of the first and second semiconductor chips, a first connection member on the first and second semiconductor chips including a first redistribution layer electrically connected to the connection pads of the first and second semiconductor chips and a heat dissipation pattern layer, at least one passive component above the first semiconductor chip on the first connection member, and at least one heat dissipation structure above the second semiconductor chip on the first connection member and connected to the heat dissipation pattern layer.
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公开(公告)号:US20200321257A1
公开(公告)日:2020-10-08
申请号:US16513193
申请日:2019-07-16
发明人: Myung Sam KANG , Moon Il KIM , Young Gwan KO
IPC分类号: H01L23/055 , H01L23/31 , H01L23/00 , H01L23/498
摘要: A semiconductor package may include a frame including an insulation layer having a cavity formed in a lower surface of the insulation layer, a first post and a second post spaced apart from the cavity, and a metal plate disposed on an upper side of the cavity; a semiconductor chip having a first surface on which a connection pad is disposed and a second surface opposing the first surface; an encapsulant covering at least a portion of the semiconductor chip; and a connection structure disposed on the frame and the first surface of the semiconductor chip, and including one or more redistribution layers. The first post is electrically connected to the wiring layer of the frame and the redistribution layer of the connection structure, and the second post is spaced apart from the first post.
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公开(公告)号:US20190198429A1
公开(公告)日:2019-06-27
申请号:US16012037
申请日:2018-06-19
发明人: Myung Sam KANG , Young Gwan KO , Jeong Ho LEE , Shang Hoon SEO , Yong Jin SEOL
IPC分类号: H01L23/495 , H01L23/552 , H01L23/34
CPC分类号: H01L23/4952 , H01L23/34 , H01L23/49541 , H01L23/49575 , H01L23/552
摘要: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is disposed on the stopper layer; first metal bumps disposed on the connection pads; an encapsulant covering at least portions of each of the frame, the semiconductor chip, and the first metal bumps and filling at least portions of the recess portion; a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers and the connection pads to each other; and a first blocking structure disposed on walls of the recess portion to surround side surfaces of the semiconductor chip.
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公开(公告)号:US20190164876A1
公开(公告)日:2019-05-30
申请号:US15919507
申请日:2018-03-13
发明人: Jae Ean LEE , Tae Sung JEONG , Young Gwan KO , Ik Jun CHOI , Jung Soo BYUN
IPC分类号: H01L23/498 , H01L23/15 , H01L21/78 , H01L21/56 , H01L23/532
CPC分类号: H01L23/49838 , H01L21/561 , H01L21/78 , H01L23/15 , H01L23/49816 , H01L23/49822 , H01L23/53228 , H01L2221/68318
摘要: A carrier substrate comprises a core layer, a first metal layer disposed on the core layer, a release layer disposed on the first metal layer, and a second metal layer disposed on the release layer. At least one layer among the first metal layer, the release layer, and the second metal layer is disposed in a plurality of unit pattern portions having an area smaller than an area of the core layer. In addition, a method of manufacturing a semiconductor package using the carrier substrate is provided.
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公开(公告)号:US20190131285A1
公开(公告)日:2019-05-02
申请号:US15900568
申请日:2018-02-20
发明人: Yeong A KIM , Eun Sil KIM , Young Gwan KO , Akihisa KUROYANAGI , Jin Su KIM , Jun Woo MYUNG
IPC分类号: H01L25/16 , H01L23/31 , H01L23/00 , H01L23/498 , H01L49/02 , H01L21/56 , H01L21/48 , H01L21/52
摘要: A fan-out semiconductor package module includes a core member having first and second through-holes. A semiconductor chip is in the first through-hole and has an active surface with a connection pad and an inactive surface opposing the active surface. Another passive component is in the second through-hole. An first encapsulant covers at least portions of the core member and the passive component, and fills at least a portion of the second through-hole. A reinforcing member is on the first encapsulant. A second encapsulant covers at least a portion of the semiconductor chip, and fills at least a portion of the first through-hole. A connection member is on the core member, the active surface of the semiconductor chip, and the passive component, and includes a redistribution layer electrically connected to the connection pad and the passive component.
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公开(公告)号:US20190131221A1
公开(公告)日:2019-05-02
申请号:US15913429
申请日:2018-03-06
发明人: Jae Ean LEE , Tae Sung JEONG , Young Gwan KO , Suk Ho LEE , Jung Soo BYUN
IPC分类号: H01L23/498 , H01L23/31 , H01L21/48
摘要: A semiconductor package includes a semiconductor chip; a connection member having a first surface on which the semiconductor chip is disposed and a second surface opposing the first surface, an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip, a passivation layer on the second surface of the connection member; and an UBM layer partially embedded in the passivation layer, wherein the UBM layer includes an UBM via embedded in the passivation layer and connected to the redistribution layer of the connection member and an UBM pad connected to the UBM via and protruding from a surface of the passivation layer, and a width of a portion of the UBM via in contact with the UBM pad is narrower than a width of a portion of the UBM via in contact with the redistribution layer.
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公开(公告)号:US20190013276A1
公开(公告)日:2019-01-10
申请号:US15802131
申请日:2017-11-02
发明人: Han Ul LEE , Jin Su KIM , Young Gwan KO
IPC分类号: H01L23/538 , H01L23/31 , H01L23/00 , H01L21/48 , H01L21/56
CPC分类号: H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/56 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/5383 , H01L23/5386 , H01L24/19 , H01L24/20 , H01L2221/68345 , H01L2224/16227 , H01L2224/214 , H01L2224/73204 , H01L2224/81005 , H01L2924/15311 , H01L2924/18161
摘要: A semiconductor device includes a semiconductor chip having an active surface having connection pads disposed thereon; an encapsulant encapsulating at least portions of the semiconductor chip, a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads, a passivation layer disposed on the connection member, and an under bump metallurgy (UBM) layer embedded in the passivation layer and electrically connected to the redistribution layer of the connection member. The UBM layer includes a UBM pad embedded in the passivation layer and having a recess portion, and a UBM via penetrating through a portion of the passivation layer and electrically connecting the redistribution layer of the connection member and the UBM pad to each other.
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公开(公告)号:US20180197832A1
公开(公告)日:2018-07-12
申请号:US15916785
申请日:2018-03-09
发明人: Da Hee KIM , Young Gwan KO
IPC分类号: H01L23/00 , H01L23/528 , H01L23/31 , H01L23/29
摘要: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; a resin layer disposed on the encapsulant; and a rear redistribution layer embedded in the encapsulant so that one surface thereof is exposed by the encapsulant, wherein the resin layer covers at least portions of the exposed one surface of the rear redistribution layer, and the rear redistribution layer is electrically connected to the redistribution layer of the first connection member through connection members formed in first openings penetrating through the resin layer and the encapsulant.
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公开(公告)号:US20170330814A1
公开(公告)日:2017-11-16
申请号:US15667738
申请日:2017-08-03
发明人: Seung On KANG , Woo Sung HAN , Young Gwan KO , Chul Kyu KIM , Han KIM
IPC分类号: H01L23/31 , H01L23/498 , H01L21/56 , H01L23/522 , H01L21/48
CPC分类号: H01L23/3128 , H01L21/4857 , H01L21/56 , H01L23/16 , H01L23/295 , H01L23/36 , H01L23/3677 , H01L23/49816 , H01L23/5226 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2924/1431 , H01L2924/1432 , H01L2924/1433 , H01L2924/14335 , H01L2924/1436 , H01L2924/1438 , H01L2924/145 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2924/3511
摘要: An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity of the frame, a first metal layer disposed on an inner wall of the cavity of the frame, an encapsulant encapsulating the electronic component, and a redistribution layer disposed below the frame and the electronic component.
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公开(公告)号:US20170162527A1
公开(公告)日:2017-06-08
申请号:US15203006
申请日:2016-07-06
发明人: Han KIM , Young Gwan KO , Kang Heon HUR , Kyung Moon JUNG , Sung Han KIM
IPC分类号: H01L23/00 , H01L23/498 , H01L23/528 , H01L23/31 , H01L23/522
CPC分类号: H01L23/481 , H01L23/3107 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/5226 , H01L23/5283 , H01L23/5384 , H01L23/5389 , H01L24/13 , H01L24/20 , H01L25/105 , H01L2224/02372 , H01L2224/0239 , H01L2224/0401 , H01L2224/04105 , H01L2224/05025 , H01L2224/05111 , H01L2224/05116 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/12105 , H01L2224/13014 , H01L2224/13016 , H01L2224/13111 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16227 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/10252 , H01L2924/10253 , H01L2924/10329 , H01L2924/1815 , H01L2924/186 , H01L2924/2064 , H01L2924/3025 , H01L2924/3511 , H01L2924/3512 , H01L2924/35121
摘要: An electronic component package may include: a redistribution layer including a first insulating layer, a first conductive pattern disposed on the first insulating layer, and a first via connected to the first conductive pattern while penetrating through the first insulating layer; an electronic component disposed on the redistribution layer; and an encapsulant encapsulating the electronic component. The first via has a horizontal cross-sectional shape in which a distance between first and second edge points of the first via in a first direction passing through the center of the first via and the first and second edge points thereof is shorter than that between third and fourth edge points of the first via in a second direction perpendicular to the first direction and passing through the center of the first via and the third and fourth points thereof.
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