Semiconductor device including capacitor and method of forming the same

    公开(公告)号:US10825889B2

    公开(公告)日:2020-11-03

    申请号:US16012997

    申请日:2018-06-20

    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.

    SEMICONDUCTOR DEVICE
    2.
    发明申请

    公开(公告)号:US20200286985A1

    公开(公告)日:2020-09-10

    申请号:US16590565

    申请日:2019-10-02

    Abstract: There is provided a semiconductor device capable of improving the performance and/or reliability of the element, by increasing the capacitance of the capacitor, using a capacitor dielectric film including a ferroelectric material and a paraelectric material. The semiconductor device includes first and second electrodes disposed to be spaced apart from each other, and a capacitor dielectric film disposed between the first electrode and the second electrode and including a first dielectric film and a second dielectric film. The first dielectric film includes one of a first monometal oxide film and a first bimetal oxide film, the first dielectric film has an orthorhombic crystal system, the second dielectric film includes a paraelectric material, and a dielectric constant of the capacitor dielectric film is greater than a dielectric constant of the second dielectric film.

    Semiconductor device including capacitor and method of forming the same

    公开(公告)号:US12230667B2

    公开(公告)日:2025-02-18

    申请号:US17854679

    申请日:2022-06-30

    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.

    Semiconductor device including capacitor and method of forming the same

    公开(公告)号:US11411069B2

    公开(公告)日:2022-08-09

    申请号:US17030678

    申请日:2020-09-24

    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.

    SEMICONDUCTOR MEMORY DEVICES
    9.
    发明公开

    公开(公告)号:US20240357796A1

    公开(公告)日:2024-10-24

    申请号:US18543261

    申请日:2023-12-18

    CPC classification number: H10B12/377 H01L28/55 H10B12/36 H10B12/50 H10B53/30

    Abstract: Provided is a semiconductor memory device. The semiconductor memory device includes a substrate, a channel region on the substrate, first and second source/drain regions electrically connected to the channel region, a gate electrode that extends in a first direction and is on the channel region, a conductive line that extends in a second direction intersecting the first direction and is electrically connected to the second source/drain region, and a capacitor structure electrically connected to the first source/drain region on the substrate. The capacitor structure may include a plurality of first electrodes stacked and spaced apart from each other in a third direction perpendicular to an upper surface of the substrate, a plurality of trenches extending into the plurality of first electrodes, a capacitor dielectric film that extends along side walls of each of the plurality of trenches, and a plurality of second electrodes in the plurality of trenches, respectively.

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