公开(公告)号：US20240321599A1

公开(公告)日：2024-09-26

申请号：US18418827

申请日：2024-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hoyoung RYU ,  SEUNGKWAN HONG ,  JAEWON LEE ,  Daeok KIM ,  YEOJIN SHIN ,  Dongchan CHOI

IPC: H01L21/67 ,  B01J35/39 ,  H01L21/02

CPC classification number: H01L21/67051 ,  B01J35/39 ,  H01L21/02052 ,  H01L21/67115

Abstract: Disclosed are semiconductor fabrication systems, chemical supply apparatuses, and substrate processing methods. The semiconductor fabrication system comprises a substrate processing apparatus and a chemical supply apparatus that supplies the substrate processing apparatus with a chemical. The chemical supply apparatus includes a main tank, a supply line that connects the main tank to an inlet of the substrate processing apparatus, a recycle tank connected to an outlet of the substrate processing apparatus, and a recycle filtering device between the recycle tank and the main tank. The recycle filtering device includes a photocatalytic reactor, a nanofilter between the photocatalytic reactor and the main tank, and a connection line that connects the photocatalytic reactor to the nanofilter.

公开(公告)号：US20170060791A1

公开(公告)日：2017-03-02

申请号：US15190629

申请日：2016-06-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNHO HUH ,  HORANG JANG ,  TOMAS SCHERRER ,  JAEWON LEE

IPC: G06F13/16 ,  G11C8/10 ,  G11C7/10 ,  G11C7/22 ,  G06F13/36 ,  G06F13/42

CPC classification number: G06F13/1689 ,  G06F13/1673 ,  G06F13/36 ,  G06F13/4282 ,  G11C7/1066 ,  G11C7/1093 ,  G11C7/222 ,  G11C2207/10 ,  Y02D10/14 ,  Y02D10/151

Abstract: A system including: a master device configured to generate a first signal having a periodic pulse, wherein the first signal includes data; and a slave device including a pin, a delay circuit, a buffer, and a processing circuit, wherein the slave device receives the first signal at the pin, delays the first signal with the delay circuit to generate a second signal having a first delay, delays the first signal with the buffer to generate a third signal having a second delay, and reads the data from the second signal using the third signal at the processing circuit.

Abstract translation: 一种系统，包括：主设备，被配置为生成具有周期性脉冲的第一信号，其中所述第一信号包括数据; 以及包括引脚，延迟电路，缓冲器和处理电路的从设备，其中从设备在引脚处接收第一信号，用延迟电路延迟第一信号以产生具有第一延迟的第二信号， 用缓冲器延迟第一信号以产生具有第二延迟的第三信号，并且在处理电路处使用第三信号从第二信号读取数据。

公开(公告)号：US20200242066A1

公开(公告)日：2020-07-30

申请号：US16734844

申请日：2020-01-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYUNGSOO LEE ,  JAEWON LEE ,  JUNHO HUH ,  HELIN LIN

IPC: G06F13/40 ,  G06F13/42 ,  G06F13/24 ,  G06F9/4401

Abstract: A semiconductor integrated circuit includes a central processing unit, a hardware function block that outputs a plurality of hardware signals to be transmitted to an external device independently of the central processing unit, a virtual general purpose input/output (GPIO) finite state machine that transforms the plurality of hardware signals to a virtual GPIO payload, and an I3C communication block that transmits the virtual GPIO payload to the external device through a serial data line and a serial clock line.