公开(公告)号：US20220415778A1

公开(公告)日：2022-12-29

申请号：US17655573

申请日：2022-03-21

Applicant: Samsung Electronics Co., LTD.

Inventor： JUNWOO PARK ,  SEUNGHWAN KIM ,  JUNGJOO KIM ,  YONGKWAN LEE ,  DONGJU JANG

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor package includes a lower substrate that includes a lower wiring layer; a semiconductor chip disposed on the lower substrate, and an upper substrate disposed on the semiconductor chip. The upper substrate includes a lower surface that faces the semiconductor chip, an upper wiring layer, and a plurality of protruding structures disposed below the lower surface. The lower surface of the upper substrate includes a cavity region that overlaps the semiconductor chip in a first direction, and a plurality of channel regions that extend from the cavity region to an edge of the upper substrate. The cavity region and the plurality of channel regions are defined by the plurality of protruding structures.

公开(公告)号：US20230114892A1

公开(公告)日：2023-04-13

申请号：US17745601

申请日：2022-05-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JONGWAN KIM ,  YONGKWAN LEE ,  KYONGHWAN KOH ,  SEUNGHWAN KIM ,  JUNGJOO KIM ,  JUNWOO PARK ,  TAEJUN JEON

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/31 ,  H01L23/29

Abstract: A semiconductor package includes; a package substrate, a semiconductor chip on the package substrate, an electromagnetic shield structure on the package substrate and including an upper cover covering an upper surface of the semiconductor chip and a side cover surrounding the semiconductor chip, and a sealing member contacting the semiconductor chip and the electromagnetic shield structure, wherein the side cover includes first through holes and the upper cover includes second through holes.

公开(公告)号：US20200098734A1

公开(公告)日：2020-03-26

申请号：US16698749

申请日：2019-11-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHANHEE JEONG ,  HYUNKI KIM ,  JUNWOO PARK ,  BYOUNG WOOK JANG ,  SUNCHUL KIM ,  SU-MIN PARK ,  PYOUNGWAN KIM ,  INKU KANG ,  HEEYEOL KIM

IPC: H01L25/10 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00

Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.

公开(公告)号：US20180145061A1

公开(公告)日：2018-05-24

申请号：US15818346

申请日：2017-11-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHANHEE JEONG ,  HYUNKI KIM ,  JUNWOO PARK ,  BYOUNG WOOK JANG ,  SUNCHUL KIM ,  SU-MIN PARK ,  PYOUNGWAN KIM ,  INKU KANG ,  HEEYEOL KIM

IPC: H01L25/10 ,  H01L23/538 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/00

CPC classification number: H01L25/105 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/48 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/214 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2924/00

Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.