公开(公告)号：US20170134048A1

公开(公告)日：2017-05-11

申请号：US14937379

申请日：2015-11-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： GUY INBAR ,  MOSHE TWITTO ,  ERAN HOF ,  JUN JIN KONG

IPC: H03M13/11 ,  H03M13/00

CPC classification number: H03M13/1125 ,  H03M13/1111 ,  H03M13/616 ,  H03M13/6588 ,  H03M13/6594

Abstract: A decoding method for an iterative message-passing based decoder, such as a low-density parity-check (LDPC) decoder, includes calculating syndrome information for a received word, and initializing variable nodes based on the received word. Each received bit of the received word may be represented by a Likelihood-Ratio (LR) or Log-Likelihood-Ratio (LLR) at a respective variable node. Further, the method includes iteratively updating check nodes, and updating the LRs of variable nodes using the syndrome information, determining an error vector from the LRs of the variable nodes, and determining a transmitted word, corresponding to the received word, by subtracting the error vector from the received word. The syndrome information is calculated based upon a parity check matrix.

公开(公告)号：US20140281827A1

公开(公告)日：2014-09-18

申请号：US14208340

申请日：2014-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MOSHE TWITTO ,  AVNER DOR ,  JUN JIN KONG ,  Chang Kyu SEOl ,  HONG RAK SON

IPC: G06F11/10

CPC classification number: G06F11/1072 ,  G06F11/108

Abstract: A method of processing data using a memory controller includes determining at least one cell state to which each of a plurality of multi-level cells can be changed to based on a current cell state of each multi-level cell, where each multi-level cell includes a plurality of data pages; determining one of the data pages as having a stuck bit when a value of the data page has a single mapping value based on mapping values mapped to the at least one cell state and generating stuck bit data regarding the stuck bit; and encoding write data to be stored in the multi-level cells based on the stuck bit data.

Abstract translation: 使用存储器控制器处理数据的方法包括基于每个多级单元的当前单元状态来确定可以改变多个多电平单元中的每一个的至少一个单元状态，其中每个多电平单元 包括多个数据页; 当数据页的值基于映射到所述至少一个单元状态的映射值具有单个映射值并且生成关于所述卡位的卡位位数据时，将所述数据页之一确定为具有卡住位; 以及基于所述卡住的位数据对要存储在所述多级单元中的写入数据进行编码。

公开(公告)号：US20190114228A1

公开(公告)日：2019-04-18

申请号：US15730943

申请日：2017-10-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MOSHE TWITTO ,  YARON SHANY ,  AVNER DOR ,  ELONA EREZ ,  JUN JIN KONG

IPC: G06F11/10 ,  G06F3/06 ,  H03M13/15 ,  H03M13/29

CPC classification number: G06F11/1076 ,  G06F3/0619 ,  G06F11/1072 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/29 ,  H03M13/2906

Abstract: A method of encoding generalized concatenated error-correcting codes includes providing a parity Matrix {tilde over (H)}j of a j-th layer code and predefined syndrome {tilde over (s)} of length n−{tilde over (k)}j, where the first n−kl coordinates are zero, n is a length of a codeword c of a first layer BCH code Cl of dimension {tilde over (k)}j, codeword c satisfies {tilde over (H)}jc={tilde over (s)}, a first layer code includes only a BCH code, and each subsequent layer includes a Reed-Solomon (RS) stage followed by a BCH code; finding a square matrix Rj of dimension (n−{tilde over (k)}j)(n−{tilde over (k)}j) such that Rj{tilde over (H)}j=(A|I), where A is an arbitrary matrix, Rj=(Qj|Tj), where Q has n−kl columns and Tj has k1−{tilde over (k)} columns; finding a vector c=(a b) where a is a vector of length {tilde over (k)}j and b is a vector of length n−{tilde over (k)}j; and solving ( A | I )  ( a b ) = ( Q j | T j )  s ~ = T j  s where a=0 and b=Tjs, and codeword c is nonzero only on the last n−{tilde over (k)}j=n−kj bits.

公开(公告)号：US20170161141A1

公开(公告)日：2017-06-08

申请号：US14956726

申请日：2015-12-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOAV SHERESHEVSKI ,  MOSHE TWITTO ,  JUN JIN KONG

IPC: G06F11/10 ,  H03M13/15 ,  G11C29/52

CPC classification number: H03M13/152 ,  G06F11/1012 ,  H03M13/09 ,  H03M13/1111 ,  H03M13/2906 ,  H03M13/2948 ,  H03M13/451 ,  H03M13/458

Abstract: A method of correcting values errantly attributed to bits of error correction code (ECC) blocks during a read operation. The method includes, upon determining that an error exists in the jth bit of one or more of the ECC blocks: 1) retrieving an estimate of the voltage value stored by the nonvolatile memory cell corresponding to the jth bit of each of the ECC blocks having errant data; 2) identifying, among the voltage value estimates retrieved in operation (1), an ECC block whose corresponding voltage value estimate retrieved in operation (1) is closest to the voltage value of a decision boundary for determining whether to assign a bit value of “0” or “1” to the jth bit of the ECC blocks; and 3) inverting the value of the jth bit of the ECC block identified in operation (2).

公开(公告)号：US20190007062A1

公开(公告)日：2019-01-03

申请号：US15639475

申请日：2017-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MOSHE TWITTO ,  MOSHE BEN ARI ,  AVNER DOR ,  ELONA EREZ ,  JUN JIN KONG ,  YARON SHANY

IPC: H03M13/15 ,  H03M13/29 ,  H03M13/00

CPC classification number: H03M13/152 ,  H03M13/1515 ,  H03M13/2906 ,  H03M13/2909 ,  H03M13/2927 ,  H03M13/2948 ,  H03M13/356 ,  H03M13/3707 ,  H03M13/616 ,  H03M13/617

Abstract: A method for generating a binary GTP codeword, comprised of N structure stages and each stage comprises at least one BCH codeword with error correction capability greater than a prior stage and smaller than a next stage, includes: receiving a syndrome vector s of a new stage 0 binary BCH codeword y over a field GF(2m) that comprises Δt syndromes of length m bits, wherein the syndrome vector s comprises l-th Reed-Solomon (RS) symbols of Δt RS codewords whose information symbols are delta syndromes of all BCH codewords from stage 0 until stage n−1; and multiplying s by a right submatrix Ũ of a matrix U, wherein U is an inverse of a parity matrix of an BCH code defined by tn, wherein the new binary BCH codeword is y=Ũ·s.

公开(公告)号：US20150103596A1

公开(公告)日：2015-04-16

申请号：US14446350

申请日：2014-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： AVNER DOR ,  MOSHE TWITTO ,  JUN-JIN KONG ,  HONG-RAK SON ,  YOUNG-GEON YOO

IPC: G11C16/10 ,  G11C16/08

CPC classification number: G11C16/10 ,  G06F11/1048 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/08

Abstract: Provided are a coding/decoding method for use in a multi-level memory system. The coding method includes searching for a set of symbols that may generate a forbidden pattern that is set initially from an input data stream, and sticking at least one bit included in the searched set of the symbols that may generate the forbidden pattern so as not to generate the forbidden pattern.

Abstract translation: 提供了一种用于多级存储器系统中的编码/解码方法。 编码方法包括搜索可以生成最初从输入数据流设置的禁止模式的一组符号，并且将包含在搜索到的可能生成禁止模式的符号组中的至少一个比特，以便不 生成禁止的模式。

公开(公告)号：US20130322175A1

公开(公告)日：2013-12-05

申请号：US13803390

申请日：2013-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUN-JIN KONG ,  AVNER DOR ,  MOSHE TWITTO ,  SHAY LANDIS

IPC: G11C16/10

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/349

Abstract: A method of operating a memory device comprises programming a first data signal to a first memory cell, attempting to program a second data signal to the first memory cell in a state where the first memory cell is not erased, and marking the first memory cell as blank upon failing to program the second data signal to the first memory cell.

Abstract translation: 操作存储器件的方法包括将第一数据信号编程到第一存储器单元，在第一存储单元未被擦除的状态下尝试将第二数据信号编程到第一存储器单元，并将第一存储单元标记为 在将第二数据信号编程到第一存储器单元时未被编程。