-
公开(公告)号:US20230069142A1
公开(公告)日:2023-03-02
申请号:US17874717
申请日:2022-07-27
发明人: Youngmin KIM , Hongjong PARK , Iljin LEE
IPC分类号: H04B1/401 , H03K17/687
摘要: A transceiver includes a first integrated circuit, a second integrated circuit and an antenna array. The first integrated circuit including a transmission chain, a reception chain, and a control circuit, the transmission chain configured to transmit a first radio frequency (RF) signal and the reception chain configured to receive a second RF signal, and the control circuit configured to selectively ground any one of the transmission chain and the reception chain according to a transmission mode or a reception mode; the second integrated circuit including an active device connected to the transmission chain and the reception chain; and the antenna array including an antenna connected to the active device.
-
公开(公告)号:US20200098336A1
公开(公告)日:2020-03-26
申请号:US16567725
申请日:2019-09-11
发明人: Youngmin KIM
IPC分类号: G09G5/10
摘要: A display apparatus includes a display; an optical sensor; and a processor configured to: obtain a current illumination value detected by the optical sensor while the display displays an image, identify a first illumination level corresponding to the obtained current illumination value, the first illumination level being previously obtained at a time when the display is displaying a preset image, identify an ambient brightness based on a second illumination level, the second illumination level corresponding to the identified first illumination level and being previously obtained at a time when the display is not displaying any image, and perform an operation based on the identified ambient brightness.
-
公开(公告)号:US20240212675A1
公开(公告)日:2024-06-27
申请号:US18599553
申请日:2024-03-08
发明人: Youngmin KIM , Hwidong NA , Min-joong LEE , Hodong LEE
IPC分类号: G10L15/183 , G10L15/00
CPC分类号: G10L15/183 , G10L15/005
摘要: A real-time processor-implemented translation method and apparatus is provided. The real-time translation method includes receiving a content, determining a delay time for real-time translation based on a silence interval of the received content and an utterance interval of the received content, generating a translation result by translating a language used in the received content, and synthesizing the translation result and the received content.
-
公开(公告)号:US20230308123A1
公开(公告)日:2023-09-28
申请号:US18063301
申请日:2022-12-08
发明人: Youngmin KIM , Hongjong Park , Sangmin Yoo , Sangwook Han
CPC分类号: H04B1/0458 , H03H7/38 , H04B1/0483 , H04B1/18
摘要: A CMOS chip includes a signal converting circuit configured to convert a baseband signal and an RF signal, a plurality of ports through which the RF signal is transmitted or received, the plurality of ports being respectively included in a first transmission path, a second transmission path, and a reception path, and a plurality of matching networks connected to the signal converting circuit, the plurality of matching networks being respectively connected to the plurality of ports, a first matching network among the plurality of matching networks including an external matching network, and the external matching network being configured to perform an impedance matching of a compound semiconductor device.
-
公开(公告)号:US20210082407A1
公开(公告)日:2021-03-18
申请号:US16851211
申请日:2020-04-17
发明人: Youngmin KIM , Hwidong NA , Min-joong LEE , Hodong LEE
IPC分类号: G10L15/183 , G10L15/00
摘要: A real-time processor-implemented translation method and apparatus is provided. The real-time translation method includes receiving a content, determining a delay time for real-time translation based on a silence interval of the received content and an utterance interval of the received content, generating a translation result by translating a language used in the received content, and synthesizing the translation result and the received content.
-
公开(公告)号:US20200219015A1
公开(公告)日:2020-07-09
申请号:US16530549
申请日:2019-08-02
发明人: Jangsu LEE , Byungdeok KIM , Youngmin KIM , Woosuk KIM
摘要: A distributed inference system includes an end device and a server. The end device generates status information and generates an inference result corresponding to target data based on a first machine learning model. The server creates a second machine learning model based on the status information and a training dataset including the inference result, calculates an accuracy of the inference result, and provides the second machine learning model to the end device based on the accuracy.
-
公开(公告)号:US20230142301A1
公开(公告)日:2023-05-11
申请号:US18053806
申请日:2022-11-09
发明人: Changbo LEE , Joonseok OH , Youngmin KIM , Jihye SHIN , Hyundong LEE
IPC分类号: H01L23/498 , H01L25/10 , H01L23/00
CPC分类号: H01L23/49838 , H01L23/49894 , H01L24/16 , H01L25/105 , H01L23/49816 , H01L2224/16227 , H01L2224/16238 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/182 , H01L2924/1431 , H01L2924/1434 , H01L2924/18301
摘要: A semiconductor package includes a first redistribution structure including a plurality of first redistribution layers and a plurality of first redistribution vias. A semiconductor chip is on the first redistribution structure. The semiconductor chip includes a chip pad. A connection pad is between the first redistribution structure and the semiconductor chip, and is connected to the first redistribution structure. A connection bump is connected to the connection pad and the chip pad. A molding layer extends around the first redistribution structure and the semiconductor chip, and a through electrode extends through the molding layer. A wetting layer is between the first redistribution structure and the molding layer.
-
公开(公告)号:US20220399260A1
公开(公告)日:2022-12-15
申请号:US17672092
申请日:2022-02-15
发明人: Yoonyoung JEON , Joonseok OH , Youngmin KIM , Dongheon KANG , Changbo LEE
IPC分类号: H01L23/498 , H01L23/00 , H01L25/10 , H01L25/065
摘要: A semiconductor package may include at least one first rewiring structure, the at least one first rewiring structure including a plurality of first insulating layers vertically stacked and a plurality of first rewiring patterns included in the plurality of first insulating layers, at least one semiconductor chip on the at least one first rewiring structure, and at least one molding layer covering the at least one semiconductor chip, wherein each of the plurality of first rewiring patterns includes, a first conductive pattern, the first conductive pattern including a curved upper surface, and a first seed pattern covering a side surface and a lower surface of the first conductive pattern, and each of the first seed patterns of the plurality of first rewiring patterns having a same shape.
-
公开(公告)号:US20220377228A1
公开(公告)日:2022-11-24
申请号:US17880147
申请日:2022-08-03
发明人: Sanghyeon LIM , Junhyeon KIM , Dongyoung CHOI , Dongo KIM , Youngmin KIM , Junki CHO , Jiyoon PARK , Kihuk LEE
IPC分类号: H04N5/235
摘要: An electronic device and a high dynamic range (HDR) image generation method therefore are provided. The electronic device includes an image sensor and a processor, wherein the processor can be configured to adjust the exposure of the image sensor so as to acquire a first image having a first brightness and a plurality of second images having a second brightness, perform, on the first image, brightness conversion and noise attenuation of at least a first intensity so as to provide a third image having the second brightness, and generate a second HDR image on the basis of the first image and the third image, and generate a second HDR image on the basis of the first HDR image and the plurality of second images.
-
公开(公告)号:US20240221795A1
公开(公告)日:2024-07-04
申请号:US18231935
申请日:2023-08-09
发明人: Youngwoo PARK , Tongsung KIM , Youngmin KIM , Seungjin PARK , Seunghoon LEE , Chaekang LIM , Youngchul CHO , Youngdon CHOI , Junghwan CHOI
CPC分类号: G11C7/1048 , H03F3/45475 , H03K5/24 , H03M1/0607 , H03F2200/375 , H03F2203/45044 , H03F2203/45212
摘要: A data converter including an autozeroing circuit including a plurality of gain circuits having a first amplification circuit and a first capacitor connected to the first amplification circuit, the first amplification circuit performing a switch feedthrough offset cancellation operation of storing an offset voltage of the autozeroing circuit in the capacitor through a switch, a comparator circuit including a first input terminal and a second input terminal, the comparator circuit comparing a first input terminal voltage level of the first input terminal with a second input terminal voltage level of the second input terminal, a first switch unit connected between the autozeroing circuit and the comparator circuit, the first switch disconnecting the autozeroing circuit from the comparator circuit during the switch feedthrough offset cancellation operation of the autozeroing circuit, and a second switch unit connected between a first input signal line and a second input signal line.
-
-
-
-
-
-
-
-
-