LOSSLESS EXCITING CURRENT SAMPLING CIRCUIT FOR ISOLATED CONVERTER

    公开(公告)号:US20250085315A1

    公开(公告)日:2025-03-13

    申请号:US18567382

    申请日:2022-12-29

    Abstract: A lossless exciting current sampling circuit for an isolated converter includes first and second voltage sampling circuits and a subtraction circuit formed by an operational amplifier. The two sampling circuits sample voltages of the primary winding of an isolation transformer, with outputs fed into the subtracter. The subtracter output is the circuit's output. RC low-pass filters with large time constants are used as primary voltage sampling circuits, realizing integration of voltage differences between the exciting inductance terminals, enabling lossless current sampling without resistors or transformers. The current sampling result is utilized for volt-second balance control, realized along with a hold circuit and comparator which compares the sampling hold result with the current sampling result to generate a control signal.

    ENHANCEMENT-MODE N-CHANNEL AND P-CHANNEL GAN DEVICE INTEGRATION STRUCTURE

    公开(公告)号:US20240266430A1

    公开(公告)日:2024-08-08

    申请号:US18577714

    申请日:2022-12-29

    CPC classification number: H01L29/7787 H01L29/1066 H01L29/2003 H01L29/207

    Abstract: An enhancement-mode N-channel and P-channel GaN device integration structure comprises a substrate, wherein an Al—N nucleating layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer are sequentially arranged on the substrate, and the AlGaN barrier layer and the GaN channel layer are divided by an isolation layer; a P-channel device is arranged on one side of the isolation layer and comprises a first P-GaN layer, a first GaN isolation layer and a first P+-GaN layer are sequentially arranged on the first P-GaN layer, a first source, a first gate and a first drain are arranged on the first P+-GaN layer, the first gate is inlaid in the first P+-GaN layer, and a gate dielectric layer is arranged between the first gate and the first P+-GaN layer; and an N-channel device is arranged on the other side of the isolation layer.

    SYSTEM AND METHOD FOR CONTROLLING ACTIVE CLAMP FLYBACK CONVERTER

    公开(公告)号:US20220069718A1

    公开(公告)日:2022-03-03

    申请号:US17420866

    申请日:2020-06-19

    Abstract: Disclosed are a system and method for controlling an active clamp flyback (ACF) converter. The system includes: a drive module configured to control turning-on or turning-off of a main switching transistor SL and a clamp switching transistor SH; a main switching transistor voltage sampling circuit configured to sample a voltage drop between an input terminal and an output terminal of the main switching transistor SL; a first comparator connected to the main switching transistor voltage sampling circuit and configured to determine whether a sampled first sampling voltage is a positive voltage or a negative voltage; and a dead time calculation module configured to adjust, according to an output of the first comparator and a main switching transistor control signal DUTYL of a current cycle, a clamp switching transistor control signal DUTYH of next cycle outputted by the drive module.

    CONTROL METHOD FOR FOUR-SWITCH BUCK-BOOST CONVERTER

    公开(公告)号:US20240266959A1

    公开(公告)日:2024-08-08

    申请号:US18566102

    申请日:2022-09-26

    CPC classification number: H02M3/1582 H02M1/0058 H02M1/088

    Abstract: A control method for a four-switch buck-boost converter is provided. The control method adopts four-stage control, and divides the load range into two sections and adopts different control strategies according to a critical load value corresponding to optimal control. In Boost mode, before the critical load, T1 and T2 are kept constant, T3 is a minimum value for realizing soft-switching, and T4 decreases with the increase of the load; when the critical load is reached, T4 drops to 0; and after the critical load, T1, T2, T3 and T increase with the load. In Buck mode, before the critical load, T2 and T3 are kept constant, T1 is a minimum value for realizing soft-switching, and T4 decreases with the increase of the load; when the critical load is reached, T4 drops to 0; and after the critical load, T1, T2, T3 and T increase with the load.

    INSULATED GATE BIPOLAR TRANSISTOR

    公开(公告)号:US20220376094A1

    公开(公告)日:2022-11-24

    申请号:US17762212

    申请日:2020-08-26

    Abstract: An insulated gate bipolar transistor, comprising an anode second conductivity-type region and an anode first conductivity-type region provided on a drift region; the anode first conductivity-type region comprises a first region and a second region, and the anode second conductivity-type region comprises a third region and a fourth region, the dopant concentration of the first region being less than that of the second region, the dopant concentration of the third region being less than that of the fourth region, the third region being provided between the fourth region and a body region, the first region being provided below the fourth region, and the second region being provided below the third region and located between the first region and the body region.

    SELF-ADAPTIVE SYNCHRONOUS RECTIFICATION CONTROL SYSTEM AND METHOD OF ACTIVE CLAMP FLYBACK CONVERTER

    公开(公告)号:US20210194375A1

    公开(公告)日:2021-06-24

    申请号:US16617508

    申请日:2018-09-28

    Abstract: The invention discloses a self-adaptive synchronous rectification control system and a self-adaptive synchronous rectification control method of an active clamp flyback converter. The control system comprises a sampling and signal processing circuit, a control circuit with a microcontroller as a core and a gate driver. According to the control method, a switching-on state, an early switching-off state, a late switching-off state and an exact switching-off state of a secondary synchronous rectifier of the active clamp flyback converter can be directly detected, and the synchronous rectifier and a switching-on time of the synchronous rectifier in next cycle can be controlled according to a detection result. After several cycles of self-adaptive control, the synchronous rectifier enters the exact switching-on state, thus avoiding oscillation of an output waveform of the active clamp flyback converter.

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