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    PACKAGE WITH POLYMER PILLARS AND RAISED PORTIONS
    2.
    发明申请
    PACKAGE WITH POLYMER PILLARS AND RAISED PORTIONS 有权

    公开(公告)号：US20220165699A1

    公开(公告)日：2022-05-26

    申请号：US17522717

    申请日：2021-11-09

    申请人： STMICROELECTRONICS PTE LTD

    发明人： Jing-En LUAN

    IPC分类号： H01L23/00

    摘要： The present disclosure is directed to semiconductor packages that include a molding compound having at least one raised portion that extends outward from the package. In some embodiments, the semiconductor packages have a plurality of raised portions, and a plurality of conductive layers are on the plurality of raised portions. The plurality of raised portions and the plurality of conductive layers are utilized to mount the semiconductor packages to an external electronic device (e.g., a printed circuit board (PCB), another semiconductor package, an external electrical connection, etc.). In some embodiments, the semiconductor packages have a single raised portion with a plurality of conductive layers that are on the single raised portion. The single raised portion and the plurality of conductive layers are utilized to mount the semiconductor packages to the external electronic device. The plurality of conductive layers on the plurality of raised portions or the single raised portion may be formed by a laser direct structuring (LDS) process.

    SEMICONDUCTOR DEVICE WITH A DIELECTRIC BETWEEN PORTIONS
    3.
    发明申请
    SEMICONDUCTOR DEVICE WITH A DIELECTRIC BETWEEN PORTIONS 审中-公开

    公开(公告)号：US20200381320A1

    公开(公告)日：2020-12-03

    申请号：US16880684

    申请日：2020-05-21

    申请人： STMicroelectronics PTE LTD

    发明人： Jing-En LUAN

    IPC分类号： H01L23/29 ,  H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L25/065 ,  H01L23/00

    摘要： A semiconductor device having a channel between active sections or portions of the device is disclosed. An elastic material, such as dielectric or a polymer, is deposited into the channel and cured to increase flexibility and thermal expansion properties of the semiconductor device. The elastic material reduces the thermal and mechanical mismatch between the semiconductor device and the substrate to which the semiconductor device is coupled in downstream processing to improve reliability. The semiconductor device may also include a plurality of channels formed transverse with respect to each other. Some of the channels extend all the way through the semiconductor device, while other channels extend only partially through the semiconductor device.

    MOLDED PROXIMITY SENSOR
    4.
    发明申请
    MOLDED PROXIMITY SENSOR 审中-公开

    公开(公告)号：US20190391264A1

    公开(公告)日：2019-12-26

    申请号：US16562189

    申请日：2019-09-05

    申请人： STMICROELECTRONICS PTE LTD

    发明人： Jing-En LUAN ,  Jerome TEYSSEYRE

    IPC分类号： G01S17/02 ,  G01S7/481 ,  H01L25/16

    摘要： A proximity sensor includes a printed circuit board substrate, a semiconductor die, electrical connectors, a lens, a light emitting assembly, and an encapsulating layer. The semiconductor die is positioned over the printed circuit board substrate with its upper surface facing away from the printed circuit board substrate. Each of the electrical connectors is in electrical communication with a contact pad of the semiconductor die and a respective contact pad of the printed circuit board substrate. The lens is positioned over a sensor area of the semiconductor die. The light emitting assembly includes a light emitting device having a light emitting area, a lens positioned over the light emitting area, and contact pads facing the printed circuit board substrate. The encapsulating layer is positioned on the printed circuit board substrate, at least one of the electrical connectors, the semiconductor die, the lens, and the light emitting assembly.

    GLUE BLEEDING PREVENTION CAP FOR OPTICAL SENSOR PACKAGES
    5.
    发明申请
    GLUE BLEEDING PREVENTION CAP FOR OPTICAL SENSOR PACKAGES 审中-公开

    公开(公告)号：US20180062003A1

    公开(公告)日：2018-03-01

    申请号：US15340216

    申请日：2016-11-01

    申请人： STMICROELECTRONICS PTE LTD

    发明人： Jing-En LUAN ,  Laurent HERARD ,  Yong Jiang LEI

    IPC分类号： H01L31/0203 ,  H01L31/12 ,  H01L31/18

    CPC分类号： H01L31/0203 ,  G01S7/481 ,  G01S7/4813 ,  G01S17/026 ,  G01S17/46 ,  H01L25/50 ,  H01L31/125 ,  H01L31/153 ,  H01L31/173 ,  H01L31/18

    摘要： One or more embodiments are directed to system in package (SiP) for optical devices, such as proximity sensing or optical ranging devices. One embodiment is directed to an optical sensor package that includes a substrate, a sensor die coupled to the substrate, a light-emitting device coupled to the substrate, and a cap. The cap is positioned around side surfaces of the sensor die and covers at least a portion of the substrate. The cap includes first and second sidewalls, an inner wall having first and second side surfaces and a mounting surface, and a cover in contact with the first and second sidewalls and the inner wall. The first and second side surfaces are transverse to the mounting surface, and the inner wall includes an opening extending into the inner wall from the mounting surface. A first adhesive material is provided on the sensor die and at least partially within the opening, and secures the inner wall to the sensor die.

    LOW COST WAFER LEVEL PACKAGES AND SILICON
    7.
    发明申请
    LOW COST WAFER LEVEL PACKAGES AND SILICON 有权

    公开(公告)号：US20230032887A1

    公开(公告)日：2023-02-02

    申请号：US17860491

    申请日：2022-07-08

    申请人： STMicroelectronics Pte Ltd

    发明人： Jing-En LUAN

    IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L25/065 ,  H01L25/16

    摘要： Described herein is a method of forming wafer-level packages from a wafer. The method includes adhesively attaching front sides of first integrated circuits within the wafer to back sides of second integrated circuits such that pads on the front sides of the first integrated circuits and pads on front sides of the second integrated circuits are exposed. The method further includes forming a laser direct structuring (LDS) activatable layer over the front sides of the first integrated circuits and the second integrated circuits and over edges of the second integrated circuits, and forming desired patterns of structured areas within the LDS activatable layer. The method additionally includes metallizing the desired patterns of structured areas to form conductive areas within the LDS activatable layer.

    SEMICONDUCTOR DEVICE PACKAGE WITH CONDUCTIVE VIAS AND METHOD OF MANUFACTURING
    8.
    发明申请
    SEMICONDUCTOR DEVICE PACKAGE WITH CONDUCTIVE VIAS AND METHOD OF MANUFACTURING 有权

    公开(公告)号：US20220319963A1

    公开(公告)日：2022-10-06

    申请号：US17700259

    申请日：2022-03-21

    申请人： STMICROELECTRONICS PTE LTD

    发明人： Jing-En LUAN

    IPC分类号： H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

    摘要： The present disclosure is directed to embodiments of semiconductor device packages including a plurality of conductive vias and traces formed by an laser-direct structuring process, which includes at least a lasering step and a plating step. First ones of the plurality of conductive vias extend into an encapsulant to contact pads of a die encased within the encapsulant, and second ones of the plurality of conductive vias extend in the encapsulant to end portions of leads in the encapsulant. The second ones of the plurality of conductive vias may couple the leads to contact pads of the die. In some embodiments, the leads of the semiconductor device packages may extend outward and away from encapsulant. In some other alternative embodiments, the leads of the semiconductor device packages may extend outward and away from the encapsulant and then bend back toward the encapsulant such that an end of the lead overlaps a surface of the encapsulant at which the plurality of conductive vias are present.

    STACKED DIE PACKAGE INCLUDING A MULTI-CONTACT INTERCONNECT
    9.
    发明申请
    STACKED DIE PACKAGE INCLUDING A MULTI-CONTACT INTERCONNECT 有权

    公开(公告)号：US20220199582A1

    公开(公告)日：2022-06-23

    申请号：US17556547

    申请日：2021-12-20

    申请人： STMICROELECTRONICS PTE LTD

    发明人： Jing-En LUAN

    IPC分类号： H01L25/065 ,  H01L25/00 ,  H01L23/31

    摘要： The present disclosure is directed to a package that includes a plurality of die that are stacked on each other. The plurality of die are within a first resin and conductive layer is on the first resin. The conductive layer is coupled between ones of first conductive vias extending into the first resin to corresponding ones of the plurality of die. The conductive layer and the first conductive vias couple ones of the plurality of die to each other. A second conductive via extends into the first resin to a contact pad of the substrate, and the conductive layer is coupled to the second conductive via coupling ones of the plurality of die to the contact pad of the substrate. A second resin is on and covers the first resin and the conductive layer on the first resin. In some embodiments, the first resin includes a plurality of steps (e.g., a stepped structure). In some embodiments, the first resin includes inclined surfaces (e.g., sloped surfaces).