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    PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
    1.
    发明申请
    PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS 有权
    包装微电子图像和包装微电子图像的方法

    公开(公告)号：US20080020505A1

    公开(公告)日：2008-01-24

    申请号：US11863087

    申请日：2007-09-27

    申请人： Salman Akram ,  Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Wiliam Hiatt

    发明人： Salman Akram ,  Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Wiliam Hiatt

    IPC分类号： H01L21/00

    CPC分类号： H01L27/146 ,  H01L21/76898 ,  H01L27/14618 ,  H01L27/148 ,  H01L31/02016 ,  H01L2224/48227 ,  H01L2924/01046 ,  H01L2924/01066 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/00

    摘要： Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

    摘要翻译： 本文公开了微电子成像器，用于封装微电子成像器的方法，以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中，微电子成像管芯可以包括微电子衬底，集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道，沉积到通道中并与衬底接触的电介质衬垫，沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。

    Systems and methods for testing microelectronic imagers and microfeature devices
    5.
    发明申请
    Systems and methods for testing microelectronic imagers and microfeature devices 有权
    用于测试微电子成像器和微特征器件的系统和方法

    公开(公告)号：US20060255826A1

    公开(公告)日：2006-11-16

    申请号：US11409060

    申请日：2006-04-24

    申请人： Salman Akram ,  William Hiatt ,  Alan Wood ,  Charles Watkins ,  Kyle Kirby

    发明人： Salman Akram ,  William Hiatt ,  Alan Wood ,  Charles Watkins ,  Kyle Kirby

    IPC分类号： G01R31/26

    CPC分类号： G01R31/2635 ,  G01R31/2831

    摘要： Systems and methods for testing microelectronic imagers and microfeature devices are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece including a substrate having a front side, a backside, and a plurality of microelectronic dies. The individual dies include an integrated circuit and a plurality of contact pads at the backside of the substrate operatively coupled to the integrated circuit. The method includes contacting individual contact pads with corresponding pins of a probe card. The method further includes testing the dies. In another embodiment, the individual dies can further comprise an image sensor at the front side of the substrate and operatively coupled to the integrated circuit. The image sensors are illuminated while the dies are tested.

    摘要翻译： 本文公开了用于测试微电子成像器和微特征器件的系统和方法。 在一个实施例中，一种方法包括提供微功能工件，其包括具有正面，背面和多个微电子管芯的衬底。 各个管芯包括集成电路和在衬底的背面可操作地耦合到集成电路的多个接触焊盘。 该方法包括使各个接触垫与探针卡的相应引脚接触。 该方法还包括测试模具。 在另一个实施例中，各个管芯还可以包括在衬底的前侧的图像传感器，并可操作地耦合到集成电路。 在测试模具时，图像传感器被照亮。

    METHOD OF FORMING VIAS IN SEMICONDUCTOR SUBSTRATES AND RESULTING STRUCTURES
    8.
    发明申请
    METHOD OF FORMING VIAS IN SEMICONDUCTOR SUBSTRATES AND RESULTING STRUCTURES 有权
    在半导体衬底和结构结构中形成VIAS的方法

    公开(公告)号：US20070262464A1

    公开(公告)日：2007-11-15

    申请号：US11781083

    申请日：2007-07-20

    申请人： Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Salman Akram ,  Warren Farnworth

    发明人： Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Salman Akram ,  Warren Farnworth

    IPC分类号： H01L21/302 ,  H01L23/48 ,  H01L21/461 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L21/76898

    摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.

    摘要翻译： 公开了在半导体衬底中形成贯通孔的方法和所得到的结构。 在一个实施例中，通孔可以通过从其上的导电元件和导电元件下面的基底的一部分从活性表面形成部分通孔来形成通孔。 然后可以通过从后表面的激光烧蚀或钻孔来完成通孔。 在另一个实施例中，部分通孔可以通过激光烧蚀或从衬底的背面钻孔到其中的预定距离来形成。 通孔可以通过形成延伸通过导电元件和下面的衬底以与激光钻孔的部分通孔相交的部分通孔从活性表面完成。 在另一个实施例中，可以首先通过激光烧蚀或从衬底的背面进行钻孔形成部分通孔，然后通过干蚀刻来完成通孔。

    Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures
    9.
    发明申请
    Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures 有权

    公开(公告)号：US20060046463A1

    公开(公告)日：2006-03-02

    申请号：US11140402

    申请日：2005-05-27

    申请人： Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Salman Akram ,  Warren Farnworth

    发明人： Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Salman Akram ,  Warren Farnworth

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76898

    摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the semiconductor substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a semiconductor substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying semiconductor substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by ablation or drilling from the back surface of the semiconductor substrate followed by dry etching to complete the through via and expose the underside of the conductive element.

    Packaged microelectronic imagers and methods of packaging microelectronic imagers
    10.
    发明申请
    Packaged microelectronic imagers and methods of packaging microelectronic imagers 有权
    封装的微电子成像器和包装微电子成像器的方法

    公开(公告)号：US20050285154A1

    公开(公告)日：2005-12-29

    申请号：US10879398

    申请日：2004-06-29

    申请人： Salman Akram ,  Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  William Hiatt

    发明人： Salman Akram ,  Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  William Hiatt

    IPC分类号： H01L27/146 ,  H01L27/148 ,  H01L31/02 ,  H01L21/00

    CPC分类号： H01L27/146 ,  H01L21/76898 ,  H01L27/14618 ,  H01L27/148 ,  H01L31/02016 ,  H01L2224/48227 ,  H01L2924/01046 ,  H01L2924/01066 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/00

    摘要： Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

    摘要翻译： 本文公开了微电子成像器，用于封装微电子成像器的方法，以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中，微电子成像管芯可以包括微电子衬底，集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道，沉积到通道中并与衬底接触的电介质衬垫，沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。